diff mbox

[RESEND,v4,13/18] target-i386: Support "-cpu host" in TCG mode

Message ID 1400095810-27684-14-git-send-email-ehabkost@redhat.com
State New
Headers show

Commit Message

Eduardo Habkost May 14, 2014, 7:30 p.m. UTC 
As "-cpu host" simply means "enable every bit that can be enabled on
this host", we can emulate similar behavior even if KVM is not enabled.
We just need to set all feature bits supported by TCG, accordingly.

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
Changes v2:
 * Coding style fix (break long lines)
---
 target-i386/cpu.c | 35 +++++++++++++++++++++++++----------
 1 file changed, 25 insertions(+), 10 deletions(-)
diff mbox

Patch

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index d3c1663..77d6d3c 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -274,6 +274,16 @@  static const char *cpuid_7_0_ebx_feature_name[] = {
           CPUID_PAT | CPUID_FXSR | CPUID_MMX | CPUID_SSE | CPUID_SSE2 | \
           CPUID_PAE | CPUID_SEP | CPUID_APIC)
 
+/* Maximum CPUID level values for TCG: */
+
+/* CPUID level 7 is needed for TCG_7_0_EBX_FEATURES */
+#define TCG_MAX_LEVEL    7
+/* 0x8000000A is needed for CPUID_EXT3_SVM */
+#define TCG_MAX_XLEVEL   0x8000000A
+/* TCG_EXT4_FEATURES is 0 */
+#define TCG_MAX_XLEVEL2  0
+
+
 #define TCG_FEATURES (CPUID_FP87 | CPUID_PSE | CPUID_TSC | CPUID_MSR | \
           CPUID_PAE | CPUID_MCE | CPUID_CX8 | CPUID_APIC | CPUID_SEP | \
           CPUID_MTRR | CPUID_PGE | CPUID_MCA | CPUID_CMOV | CPUID_PAT | \
@@ -1205,8 +1215,6 @@  static void host_x86_cpu_class_init(ObjectClass *oc, void *data)
     X86CPUClass *xcc = X86_CPU_CLASS(oc);
     uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0;
 
-    xcc->kvm_required = true;
-
     host_cpuid(0x0, 0, &eax, &ebx, &ecx, &edx);
     x86_cpu_vendor_words2str(host_cpudef.vendor, ebx, edx, ecx);
 
@@ -1225,6 +1233,8 @@  static void host_x86_cpu_class_init(ObjectClass *oc, void *data)
      */
 }
 
+static uint32_t x86_cpu_get_supported_feature_word(FeatureWord w);
+
 static void host_x86_cpu_initfn(Object *obj)
 {
     X86CPU *cpu = X86_CPU(obj);
@@ -1232,17 +1242,22 @@  static void host_x86_cpu_initfn(Object *obj)
     KVMState *s = kvm_state;
     FeatureWord w;
 
-    assert(kvm_enabled());
-
-    env->cpuid_level = kvm_arch_get_supported_cpuid(s, 0x0, 0, R_EAX);
-    env->cpuid_xlevel = kvm_arch_get_supported_cpuid(s, 0x80000000, 0, R_EAX);
-    env->cpuid_xlevel2 = kvm_arch_get_supported_cpuid(s, 0xC0000000, 0, R_EAX);
+    if (kvm_enabled()) {
+        env->cpuid_level =
+            kvm_arch_get_supported_cpuid(s, 0x0, 0, R_EAX);
+        env->cpuid_xlevel =
+            kvm_arch_get_supported_cpuid(s, 0x80000000, 0, R_EAX);
+        env->cpuid_xlevel2 =
+            kvm_arch_get_supported_cpuid(s, 0xC0000000, 0, R_EAX);
+    } else {
+        env->cpuid_level = TCG_MAX_LEVEL;
+        env->cpuid_xlevel = TCG_MAX_XLEVEL;
+        env->cpuid_xlevel2 = TCG_MAX_XLEVEL2;
+    }
 
     for (w = 0; w < FEATURE_WORDS; w++) {
-        FeatureWordInfo *wi = &feature_word_info[w];
         env->features[w] =
-            kvm_arch_get_supported_cpuid(s, wi->cpuid_eax, wi->cpuid_ecx,
-                                         wi->cpuid_reg);
+            x86_cpu_get_supported_feature_word(w);
     }
     object_property_set_bool(OBJECT(cpu), true, "pmu", &error_abort);
 }