From patchwork Fri Oct 2 20:16:04 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Isaku Yamahata X-Patchwork-Id: 34892 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 31CBEB7B95 for ; Sat, 3 Oct 2009 06:35:48 +1000 (EST) Received: from localhost ([127.0.0.1]:55268 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Mtoqv-00042v-87 for incoming@patchwork.ozlabs.org; Fri, 02 Oct 2009 16:35:45 -0400 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1MtoZu-0004QY-Dv for qemu-devel@nongnu.org; Fri, 02 Oct 2009 16:18:11 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1MtoZl-0004LM-Lm for qemu-devel@nongnu.org; Fri, 02 Oct 2009 16:18:05 -0400 Received: from [199.232.76.173] (port=46071 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1MtoZl-0004LE-7y for qemu-devel@nongnu.org; Fri, 02 Oct 2009 16:18:01 -0400 Received: from mail.valinux.co.jp ([210.128.90.3]:43782) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1MtoZk-0000hw-AG for qemu-devel@nongnu.org; Fri, 02 Oct 2009 16:18:00 -0400 Received: from nm.local.valinux.co.jp (vagw.valinux.co.jp [210.128.90.14]) by mail.valinux.co.jp (Postfix) with ESMTP id ACC3249D15; Sat, 3 Oct 2009 05:17:56 +0900 (JST) Received: from yamahata by nm.local.valinux.co.jp with local (Exim 4.69) (envelope-from ) id 1MtoY6-000396-P6; Sat, 03 Oct 2009 05:16:18 +0900 From: Isaku Yamahata To: qemu-devel@nongnu.org, anthony@codemonkey.ws Date: Sat, 3 Oct 2009 05:16:04 +0900 Message-Id: <1254514577-11896-13-git-send-email-yamahata@valinux.co.jp> X-Mailer: git-send-email 1.6.0.2 In-Reply-To: <1254514577-11896-1-git-send-email-yamahata@valinux.co.jp> References: <1254514577-11896-1-git-send-email-yamahata@valinux.co.jp> X-Virus-Scanned: clamav-milter 0.95.2 at va-mail.local.valinux.co.jp X-Virus-Status: Clean X-detected-operating-system: by monty-python.gnu.org: GNU/Linux 2.6 (newer, 3) Cc: yamahata@valinux.co.jp Subject: [Qemu-devel] [PATCH 12/25] pci: 64bit bar support. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org implemented pci 64bit bar support. Signed-off-by: Isaku Yamahata --- hw/pci.c | 41 ++++++++++++++++++++++++++++++++++++----- hw/pci.h | 9 +++++++++ 2 files changed, 45 insertions(+), 5 deletions(-) diff --git a/hw/pci.c b/hw/pci.c index 510fad2..75af2cd 100644 --- a/hw/pci.c +++ b/hw/pci.c @@ -427,8 +427,13 @@ void pci_register_bar(PCIDevice *pci_dev, int region_num, addr = 0x10 + region_num * 4; } pci_set_long(pci_dev->config + addr, type); - pci_set_long(pci_dev->wmask + addr, wmask & 0xffffffff); - pci_set_long(pci_dev->cmask + addr, 0xffffffff); + if (pci_bar_is_64bit(r)) { + pci_set_quad(pci_dev->wmask + addr, wmask); + pci_set_quad(pci_dev->cmask + addr, ~0ULL); + } else { + pci_set_long(pci_dev->wmask + addr, wmask & 0xffffffff); + pci_set_long(pci_dev->cmask + addr, 0xffffffff); + } } static void pci_update_mappings(PCIDevice *d) @@ -462,7 +467,11 @@ static void pci_update_mappings(PCIDevice *d) } } else { if (cmd & PCI_COMMAND_MEMORY) { - new_addr = pci_get_long(d->config + config_ofs); + if (pci_bar_is_64bit(r)) { + new_addr = pci_get_quad(d->config + config_ofs); + } else { + new_addr = pci_get_long(d->config + config_ofs); + } /* the ROM slot has a specific enable bit */ if (i == PCI_ROM_SLOT && !(new_addr & 1)) goto no_mem_map; @@ -477,7 +486,7 @@ static void pci_update_mappings(PCIDevice *d) /* keep old behaviour * without this, PC ide doesn't work well. */ - last_addr >= UINT32_MAX) { + (!pci_bar_is_64bit(r) && last_addr >= UINT32_MAX)) { new_addr = PCI_BAR_UNMAPPED; } } else { @@ -736,7 +745,29 @@ static void pci_info_device(PCIDevice *d) monitor_printf(mon, "I/O at 0x%04"FMT_pcibus" [0x%04"FMT_pcibus"].\n", r->addr, r->addr + r->size - 1); } else { - monitor_printf(mon, "32 bit memory at 0x%08"FMT_pcibus" [0x%08"FMT_pcibus"].\n", + const char *type; + const char* prefetch; + + switch (r->type & PCI_ADDRESS_SPACE_MEM_TYPE_MASK) { + case PCI_ADDRESS_SPACE_MEM: + type = "32 bit"; + break; + case PCI_ADDRESS_SPACE_MEM_64: + type = "64 bit"; + break; + default: + type = "unknown"; + break; + } + + prefetch = ""; + if (r->type & PCI_ADDRESS_SPACE_MEM_PREFETCH) { + prefetch = " prefetchable"; + } + + monitor_printf(mon, "%s%s memory at " + "0x%08"FMT_pcibus" [0x%08"FMT_pcibus"].\n", + type, prefetch, r->addr, r->addr + r->size - 1); } } diff --git a/hw/pci.h b/hw/pci.h index c209f34..0455b30 100644 --- a/hw/pci.h +++ b/hw/pci.h @@ -84,6 +84,8 @@ typedef int PCIUnregisterFunc(PCIDevice *pci_dev); #define PCI_ADDRESS_SPACE_MEM 0x00 #define PCI_ADDRESS_SPACE_IO 0x01 +#define PCI_ADDRESS_SPACE_MEM_64 0x04 /* 64 bit address */ +#define PCI_ADDRESS_SPACE_MEM_TYPE_MASK 0x06 #define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08 typedef struct PCIIORegion { @@ -94,6 +96,13 @@ typedef struct PCIIORegion { PCIMapIORegionFunc *map_func; } PCIIORegion; +static inline int pci_bar_is_64bit(const PCIIORegion *r) +{ + return !(r->type & PCI_ADDRESS_SPACE_IO) && + ((r->type & PCI_ADDRESS_SPACE_MEM_TYPE_MASK) == + PCI_ADDRESS_SPACE_MEM_64); +} + #define PCI_ROM_SLOT 6 #define PCI_NUM_REGIONS 7