Patchwork [17/25] pci: fix pci_default_write_config()

login
register
mail settings
Submitter Isaku Yamahata
Date Oct. 2, 2009, 10:31 a.m.
Message ID <1254479517-25845-18-git-send-email-yamahata@valinux.co.jp>
Download mbox | patch
Permalink /patch/34838/
State Superseded
Headers show

Comments

Isaku Yamahata - Oct. 2, 2009, 10:31 a.m.
When updated ROM expantion address of header type 0, it missed
to update mappings.
Add PCI_ROM_ADDRESS check whether to call pci_update_mappings()

Cc: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
---
 hw/pci.c |    3 ++-
 hw/pci.h |    1 +
 2 files changed, 3 insertions(+), 1 deletions(-)
Michael S. Tsirkin - Oct. 4, 2009, 8:36 a.m.
On Fri, Oct 02, 2009 at 07:31:49PM +0900, Isaku Yamahata wrote:
> When updated ROM expantion address of header type 0, it missed
> to update mappings.
> Add PCI_ROM_ADDRESS check whether to call pci_update_mappings()
> 
> Cc: Michael S. Tsirkin <mst@redhat.com>
> Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>

Acked-by: Michael S. Tsirkin <mst@redhat.com>

> ---
>  hw/pci.c |    3 ++-
>  hw/pci.h |    1 +
>  2 files changed, 3 insertions(+), 1 deletions(-)
> 
> diff --git a/hw/pci.c b/hw/pci.c
> index 1afcfb8..c9054c1 100644
> --- a/hw/pci.c
> +++ b/hw/pci.c
> @@ -671,7 +671,8 @@ void pci_default_write_config(PCIDevice *d, uint32_t addr, uint32_t val, int l)
>          uint8_t wmask = d->wmask[addr];
>          d->config[addr] = (d->config[addr] & ~wmask) | (val & wmask);
>      }
> -    if (memcmp(orig + PCI_BASE_ADDRESS_0, d->config + PCI_BASE_ADDRESS_0, 24)
> +    if ((memcmp(orig + PCI_BASE_ADDRESS_0, d->config + PCI_BASE_ADDRESS_0, 24) ||
> +         memcmp(orig + PCI_ROM_ADDRESS, d->config + PCI_ROM_ADDRESS, 4))
>          || ((orig[PCI_COMMAND] ^ d->config[PCI_COMMAND])
>              & (PCI_COMMAND_MEMORY | PCI_COMMAND_IO)))
>          pci_update_mappings(d);
> diff --git a/hw/pci.h b/hw/pci.h
> index 66d899d..3ea5258 100644
> --- a/hw/pci.h
> +++ b/hw/pci.h
> @@ -144,6 +144,7 @@ static inline int pci_bar_is_64bit(const PCIIORegion *r)
>  #define PCI_SUBVENDOR_ID        0x2c    /* obsolete, use PCI_SUBSYSTEM_VENDOR_ID */
>  #define PCI_SUBDEVICE_ID        0x2e    /* obsolete, use PCI_SUBSYSTEM_ID */
>  
> +#define PCI_ROM_ADDRESS         0x30    /* Bits 31..11 are address, 10..1 reserved */
>  #define  PCI_ROM_ADDRESS_ENABLE 0x01
>  
>  /* Bits in the PCI Status Register (PCI 2.3 spec) */
> -- 
> 1.6.0.2

Patch

diff --git a/hw/pci.c b/hw/pci.c
index 1afcfb8..c9054c1 100644
--- a/hw/pci.c
+++ b/hw/pci.c
@@ -671,7 +671,8 @@  void pci_default_write_config(PCIDevice *d, uint32_t addr, uint32_t val, int l)
         uint8_t wmask = d->wmask[addr];
         d->config[addr] = (d->config[addr] & ~wmask) | (val & wmask);
     }
-    if (memcmp(orig + PCI_BASE_ADDRESS_0, d->config + PCI_BASE_ADDRESS_0, 24)
+    if ((memcmp(orig + PCI_BASE_ADDRESS_0, d->config + PCI_BASE_ADDRESS_0, 24) ||
+         memcmp(orig + PCI_ROM_ADDRESS, d->config + PCI_ROM_ADDRESS, 4))
         || ((orig[PCI_COMMAND] ^ d->config[PCI_COMMAND])
             & (PCI_COMMAND_MEMORY | PCI_COMMAND_IO)))
         pci_update_mappings(d);
diff --git a/hw/pci.h b/hw/pci.h
index 66d899d..3ea5258 100644
--- a/hw/pci.h
+++ b/hw/pci.h
@@ -144,6 +144,7 @@  static inline int pci_bar_is_64bit(const PCIIORegion *r)
 #define PCI_SUBVENDOR_ID        0x2c    /* obsolete, use PCI_SUBSYSTEM_VENDOR_ID */
 #define PCI_SUBDEVICE_ID        0x2e    /* obsolete, use PCI_SUBSYSTEM_ID */
 
+#define PCI_ROM_ADDRESS         0x30    /* Bits 31..11 are address, 10..1 reserved */
 #define  PCI_ROM_ADDRESS_ENABLE 0x01
 
 /* Bits in the PCI Status Register (PCI 2.3 spec) */