From patchwork Mon May 5 15:58:19 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Diana Craciun X-Patchwork-Id: 345773 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 21FDB14032C for ; Tue, 6 May 2014 02:14:38 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753487AbaEEQOg (ORCPT ); Mon, 5 May 2014 12:14:36 -0400 Received: from mail-bn1lp0140.outbound.protection.outlook.com ([207.46.163.140]:28421 "EHLO na01-bn1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753377AbaEEQOg (ORCPT ); Mon, 5 May 2014 12:14:36 -0400 Received: from BY2PR03CA034.namprd03.prod.outlook.com (10.242.234.155) by BY2PR03MB570.namprd03.prod.outlook.com (10.141.142.27) with Microsoft SMTP Server (TLS) id 15.0.929.12; Mon, 5 May 2014 15:58:30 +0000 Received: from BL2FFO11FD017.protection.gbl (2a01:111:f400:7c09::174) by BY2PR03CA034.outlook.office365.com (2a01:111:e400:2c2c::27) with Microsoft SMTP Server (TLS) id 15.0.934.12 via Frontend Transport; Mon, 5 May 2014 15:58:30 +0000 Received: from tx30smr01.am.freescale.net (192.88.168.1) by BL2FFO11FD017.mail.protection.outlook.com (10.173.161.35) with Microsoft SMTP Server (TLS) id 15.0.929.8 via Frontend Transport; Mon, 5 May 2014 15:58:29 +0000 Received: from zro04-ws660.ea.freescale.net (STFD002-01.ea.freescale.net [10.171.72.67]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id s45FwMU1014930; Mon, 5 May 2014 08:58:27 -0700 From: Diana Craciun To: CC: , , Diana Craciun Subject: [PATCH v3] powerpc/fsl: Added binding for Freescale CoreNet coherency fabric (CCF) Date: Mon, 5 May 2014 18:58:19 +0300 Message-ID: <1399305499-6612-1-git-send-email-diana.craciun@freescale.com> X-Mailer: git-send-email 1.7.11.7 X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:192.88.168.1; CTRY:US; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(10009001)(6009001)(428001)(189002)(199002)(87286001)(20776003)(101416001)(83322001)(4396001)(93916002)(88136002)(33646001)(85852003)(50986999)(86362001)(50466002)(47776003)(77096999)(87936001)(19580405001)(36756003)(79102001)(99396002)(6806004)(19580395003)(48376002)(80022001)(74662001)(62966002)(46102001)(92566001)(92726001)(77156001)(50226001)(81342001)(76482001)(31966008)(44976005)(74502001)(81542001)(83072002)(77982001)(89996001); DIR:OUT; SFP:1101; SCL:1; SRVR:BY2PR03MB570; H:tx30smr01.am.freescale.net; FPR:66E5F65E.A4E6CF32.BD5D9F0B.FDE249.203B3; MLV:sfv; PTR:gate-tx3.freescale.com; MX:1; A:1; LANG:en; MIME-Version: 1.0 X-Forefront-PRVS: 0202D21D2F Received-SPF: None (: freescale.com does not designate permitted sender hosts) X-OriginatorOrg: freescale.com Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Diana Craciun The CoreNet coherency fabric is a fabric-oriented, conectivity infrastructure that enables the implementation of coherent, multicore systems. The CCF acts as a central interconnect for cores, platform-level caches, memory subsystem, peripheral devices and I/O host bridges in the system. Signed-off-by: Diana Craciun --- v3: - added port ID mapping - removed fsl,corenetx-cf .../devicetree/bindings/powerpc/fsl/ccf.txt | 42 ++++++++++++++++++++++ .../devicetree/bindings/powerpc/fsl/cpus.txt | 8 +++++ .../devicetree/bindings/powerpc/fsl/pamu.txt | 8 +++++ 3 files changed, 58 insertions(+) create mode 100644 Documentation/devicetree/bindings/powerpc/fsl/ccf.txt diff --git a/Documentation/devicetree/bindings/powerpc/fsl/ccf.txt b/Documentation/devicetree/bindings/powerpc/fsl/ccf.txt new file mode 100644 index 0000000..1263c29 --- /dev/null +++ b/Documentation/devicetree/bindings/powerpc/fsl/ccf.txt @@ -0,0 +1,42 @@ +Freescale CoreNet Coherency Fabric(CCF) Device Tree Binding + +DESCRIPTION + +The CoreNet coherency fabric is a fabric-oriented, connectivity infrastructure +that enables the implementation of coherent, multicore systems. + +Required properties: + +- compatible : + fsl,corenet1-cf - CoreNet coherency fabric version 1. Example chips: T4240, + B4860 + fsl,corenet2-cf - CoreNet coherency fabric version 2. Example chips: P5020, + P4080, P3041, P2041 + fsl,corenet-cf - It is used to represent the common registers between + CCF version 1 and CCF version 2. This compatible is retained for + compatibility reasons as it was already used for both CCF version 1 chips + and CCF version 2 chips. + +- reg : + A standard property. Represents the CCF registers. + +- interrupts : + Interrupt mapping for CCF error interrupt. + +- fsl,ccf-num-csdids: + Specifies the number of Coherency Subdomain ID Port Mapping + Registers that are supported by the CCF. + +- fsl,ccf-num-snoopids: + Specifies the number of Snoop ID Port Mapping Registers that + are supported by CCF. + +Example: + + corenet-cf@18000 { + compatible = "fsl,corenet2-cf", "fsl,corenet-cf"; + reg = <0x18000 0x1000>; + interrupts = <16 2 1 31>; + fsl,ccf-num-csdids = <32>; + fsl,ccf-num-snoopids = <32>; + }; diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpus.txt b/Documentation/devicetree/bindings/powerpc/fsl/cpus.txt index 922c30a..09dbc5f 100644 --- a/Documentation/devicetree/bindings/powerpc/fsl/cpus.txt +++ b/Documentation/devicetree/bindings/powerpc/fsl/cpus.txt @@ -20,3 +20,11 @@ PROPERTIES a property named fsl,eref-[CAT], where [CAT] is the abbreviated category name with all uppercase letters converted to lowercase, indicates that the category is supported by the implementation. + + - fsl,portid-mapping : + The Coherency Subdomain ID Port Mapping Registers and Snoop ID Port Mapping + registers which are part of the CoreNet Coherency fabric (CCF) provide a + CoreNet Coherency Subdomain ID/CoreNet Snoop ID to cpu mapping functions. + Certain bits from these registers should be set if the coresponding CPU + should be snooped. This property defines a bitmask which selects the bit that + should be set if this cpu should be snooped. diff --git a/Documentation/devicetree/bindings/powerpc/fsl/pamu.txt b/Documentation/devicetree/bindings/powerpc/fsl/pamu.txt index 1f5e329..827c637 100644 --- a/Documentation/devicetree/bindings/powerpc/fsl/pamu.txt +++ b/Documentation/devicetree/bindings/powerpc/fsl/pamu.txt @@ -26,6 +26,13 @@ Required properties: A standard property. - #size-cells : A standard property. +- fsl,portid-mapping : + The Coherency Subdomain ID Port Mapping Registers and Snoop ID Port Mapping + registers which are part of the CoreNet Coherency fabric (CCF) provide a + CoreNet Coherency Subdomain ID/CoreNet Snoop ID to pamu mapping functions. + Certain bits from these registers should be set if PAMUs should be snooped. + This property defines a bitmask which selects the bits that should be set + if PAMUs should be snooped. Optional properties: - reg : @@ -88,6 +95,7 @@ Example: compatible = "fsl,pamu-v1.0", "fsl,pamu"; reg = <0x20000 0x5000>; ranges = <0 0x20000 0x5000>; + fsl,portid-mapping = <0xf80000>; #address-cells = <1>; #size-cells = <1>; interrupts = <