Patchwork [1/4] powerpc/fsl: 85xx: document cache-sram size as a kernel parametric option

mail settings
Submitter Vivek Mahajan
Date Sept. 24, 2009, 9:10 a.m.
Message ID <>
Download mbox | patch
Permalink /patch/34213/
State Superseded
Delegated to: Kumar Gala
Headers show


Vivek Mahajan - Sept. 24, 2009, 9:10 a.m.
Adds documentation for the size parameter of Freescale's QorIQ
based cache-sram

Signed-off-by: Vivek Mahajan <>
Resending it to

 Documentation/kernel-parameters.txt |    3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)


diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
index 0f17d16..3213844 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -412,6 +412,9 @@  and is between 256 and 4096 characters. It is defined in the file
 	c101=		[NET] Moxa C101 synchronous serial card
+	cache-sram-size=	[PPC] Size of Freescale's QorIQ Cache SRAM
+			See Documentation/powerpc/fsl_85xx_cache_sram.txt.
 	cachesize=	[BUGS=X86-32] Override level 2 CPU cache size detection.
 			Sometimes CPU hardware bugs make them report the cache
 			size incorrectly. The kernel will attempt work arounds