diff mbox

[ARM] Initialize new tune_params values

Message ID 1398271117-17894-1-git-send-email-james.greenhalgh@arm.com
State New
Headers show

Commit Message

James Greenhalgh April 23, 2014, 4:38 p.m. UTC
Hi,

Revision 209561 introduces two new paramteres for tune_params, but does
not initialize them in the Cortex-A57 or Cortex-A12 tuning structures.

This breaks bootstrap. Fixed by initializing them to sensible values.

Checked to ensure the warnings are cleared, and bootstrap can continue.

Ramana has acked this offline, so I've applied this as revision 209710
under the reasonably obvious rule.

Thanks,
James

---
gcc/

2014-04-23  James Greenhalgh  <james.greenhalgh@arm.com>

	* config/arm/arm.c (arm_cortex_a57_tune): Initialize all fields.
	(arm_cortex_a12_tune): Likewise.
diff mbox

Patch

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 88d957a..de247cd 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -1658,7 +1658,8 @@  const struct tune_params arm_cortex_a57_tune =
   true,                                       /* Prefer LDRD/STRD.  */
   {true, true},                                /* Prefer non short circuit.  */
   &arm_default_vec_cost,                       /* Vectorizer costs.  */
-  false                                        /* Prefer Neon for 64-bits bitops.  */
+  false,                                       /* Prefer Neon for 64-bits bitops.  */
+  true, true                                   /* Prefer 32-bit encodings.  */
 };
 
 /* Branches can be dual-issued on Cortex-A5, so conditional execution is
@@ -1711,7 +1712,8 @@  const struct tune_params arm_cortex_a12_tune =
   true,						/* Prefer LDRD/STRD.  */
   {true, true},					/* Prefer non short circuit.  */
   &arm_default_vec_cost,                        /* Vectorizer costs.  */
-  false                                         /* Prefer Neon for 64-bits bitops.  */
+  false,                                        /* Prefer Neon for 64-bits bitops.  */
+  false, false                                  /* Prefer 32-bit encodings.  */
 };
 
 /* armv7m tuning.  On Cortex-M4 cores for example, MOVW/MOVT take a single