From patchwork Tue Apr 22 08:27:27 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Antoine Tenart X-Patchwork-Id: 341233 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 7F2B5140082 for ; Tue, 22 Apr 2014 18:30:37 +1000 (EST) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WcW3Z-0008BO-RN; Tue, 22 Apr 2014 08:27:57 +0000 Received: from top.free-electrons.com ([176.31.233.9] helo=mail.free-electrons.com) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1WcW3W-00085w-UG for linux-arm-kernel@lists.infradead.org; Tue, 22 Apr 2014 08:27:55 +0000 Received: by mail.free-electrons.com (Postfix, from userid 106) id 7DD749C0; Tue, 22 Apr 2014 10:27:41 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.2 (2011-06-06) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT shortcircuit=ham autolearn=disabled version=3.3.2 Received: from localhost.localdomain (21.107.128.77.rev.sfr.net [77.128.107.21]) by mail.free-electrons.com (Postfix) with ESMTPSA id 317A891E; Tue, 22 Apr 2014 10:27:41 +0200 (CEST) From: =?UTF-8?q?Antoine=20T=C3=A9nart?= To: sebastian.hesselbarth@gmail.com Subject: [PATCH v2 1/2] ARM: dts: berlin: add the SDHCI nodes for the BG2Q Date: Tue, 22 Apr 2014 10:27:27 +0200 Message-Id: <1398155248-1659-2-git-send-email-antoine.tenart@free-electrons.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1398155248-1659-1-git-send-email-antoine.tenart@free-electrons.com> References: <1398155248-1659-1-git-send-email-antoine.tenart@free-electrons.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140422_012755_120776_F75EDA04 X-CRM114-Status: UNSURE ( 9.55 ) X-CRM114-Notice: Please train this message. X-Spam-Score: 0.3 (/) X-Spam-Report: SpamAssassin version 3.3.2 on bombadil.infradead.org summary: Content analysis details: (0.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain 1.0 SPF_SOFTFAIL SPF: sender does not match SPF record (softfail) Cc: zmxu@marvell.com, jszhang@marvell.com, devicetree@vger.kernel.org, =?UTF-8?q?Antoine=20T=C3=A9nart?= , linux-kernel@vger.kernel.org, alexandre.belloni@free-electrons.com, linux-arm-kernel@lists.infradead.org X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org Add the SDHCI nodes for the Marvell Berlin BG2Q, using the mrvl,pxav3-mmc driver. Signed-off-by: Antoine Ténart --- arch/arm/boot/dts/berlin2q.dtsi | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/arch/arm/boot/dts/berlin2q.dtsi b/arch/arm/boot/dts/berlin2q.dtsi index 5925e6a16749..85d0ca5cc47a 100644 --- a/arch/arm/boot/dts/berlin2q.dtsi +++ b/arch/arm/boot/dts/berlin2q.dtsi @@ -67,6 +67,14 @@ clock-div = <3>; }; + sdio1clk: sdio1clk { + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clocks = <&syspll>; + clock-mult = <1>; + clock-div = <4>; + }; + soc { compatible = "simple-bus"; #address-cells = <1>; @@ -75,6 +83,30 @@ ranges = <0 0xf7000000 0x1000000>; interrupt-parent = <&gic>; + sdhci0: sdhci@ab0000 { + compatible = "mrvl,pxav3-mmc"; + reg = <0xab0000 0x200>; + clocks = <&sdio1clk>; + interrupts = ; + status = "disabled"; + }; + + sdhci1: sdhci@ab0800 { + compatible = "mrvl,pxav3-mmc"; + reg = <0xab0800 0x200>; + clocks = <&sdio1clk>; + interrupts = ; + status = "disabled"; + }; + + sdhci2: sdhci@ab1000 { + compatible = "mrvl,pxav3-mmc"; + reg = <0xab1000 0x200>; + interrupts = ; + clocks = <&sdio1clk>; + status = "disabled"; + }; + l2: l2-cache-controller@ac0000 { compatible = "arm,pl310-cache"; reg = <0xac0000 0x1000>;