diff mbox

PATCH: PR target/60863: Incorrect codegen in ix86_expand_clear for -Os

Message ID 20140417152044.GA31228@intel.com
State New
Headers show

Commit Message

H.J. Lu April 17, 2014, 3:20 p.m. UTC 
Hi,

I checked in this preapproved patch to generate "xor reg, reg" when
optimizing for size.


H.J.
diff mbox

Patch

Index: ChangeLog
===================================================================
--- ChangeLog	(revision 209487)
+++ ChangeLog	(working copy)
@@ -1,3 +1,10 @@ 
+2014-04-17  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR target/60863
+	* config/i386/i386.c (ix86_expand_clear): Remove outdated
+	comment.  Check optimize_insn_for_size_p instead of
+	optimize_insn_for_speed_p.
+
 2014-04-17  Martin Jambor  <mjambor@suse.cz>
 
 	* gimple-iterator.c (gsi_start_edge): New function.
Index: config/i386/i386.c
===================================================================
--- config/i386/i386.c	(revision 209487)
+++ config/i386/i386.c	(working copy)
@@ -16668,8 +16668,7 @@  ix86_expand_clear (rtx dest)
     dest = gen_rtx_REG (SImode, REGNO (dest));
   tmp = gen_rtx_SET (VOIDmode, dest, const0_rtx);
 
-  /* This predicate should match that for movsi_xor and movdi_xor_rex64.  */
-  if (!TARGET_USE_MOV0 || optimize_insn_for_speed_p ())
+  if (!TARGET_USE_MOV0 || optimize_insn_for_size_p ())
     {
       rtx clob = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (CCmode, FLAGS_REG));
       tmp = gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, tmp, clob));