Patchwork ARM: imx6: clk: i.MX6 DualLite/Solo i2c4 clock

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Submitter Iain Paton
Date April 16, 2014, 6:33 p.m.
Message ID <534ECCF4.9040108@gmail.com>
Download mbox | patch
Permalink /patch/339699/
State New
Headers show

Comments

Iain Paton - April 16, 2014, 6:33 p.m.
Compared to i.MX6 Quad/Dual the CCM_CCGR1 register in the i.MX6 Solo/DualLite
replaces the ecspi5 clock with the i2c4 clock.

Handle this difference using cpu_is_imx6dl().

Signed-off-by: Iain Paton <ipaton0@gmail.com>
---
 arch/arm/mach-imx/clk-imx6q.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)
Shawn Guo - April 17, 2014, 5:01 a.m.
On Wed, Apr 16, 2014 at 07:33:24PM +0100, Iain Paton wrote:
> Compared to i.MX6 Quad/Dual the CCM_CCGR1 register in the i.MX6 Solo/DualLite
> replaces the ecspi5 clock with the i2c4 clock.
> 
> Handle this difference using cpu_is_imx6dl().
> 
> Signed-off-by: Iain Paton <ipaton0@gmail.com>
> ---
>  arch/arm/mach-imx/clk-imx6q.c | 8 +++++++-
>  1 file changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
> index b0e7f9d..2961b16 100644
> --- a/arch/arm/mach-imx/clk-imx6q.c
> +++ b/arch/arm/mach-imx/clk-imx6q.c
> @@ -352,7 +352,13 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
>  	clk[ecspi2]       = imx_clk_gate2("ecspi2",        "ecspi_root",        base + 0x6c, 2);
>  	clk[ecspi3]       = imx_clk_gate2("ecspi3",        "ecspi_root",        base + 0x6c, 4);
>  	clk[ecspi4]       = imx_clk_gate2("ecspi4",        "ecspi_root",        base + 0x6c, 6);
> -	clk[ecspi5]       = imx_clk_gate2("ecspi5",        "ecspi_root",        base + 0x6c, 8);
> +	if (cpu_is_imx6dl())
> +		/*
> +		 * ecspi5 is replaced with i2c4 on imx6dl & imx6s
> +		 */

Single line comment should be like /* bla ... */.

I fixed it up and applied the patch.  Thanks.

Shawn

> +		clk[ecspi5] = imx_clk_gate2("i2c4",        "ipg_per",           base + 0x6c, 8);
> +	else
> +		clk[ecspi5] = imx_clk_gate2("ecspi5",      "ecspi_root",        base + 0x6c, 8);
>  	clk[enet]         = imx_clk_gate2("enet",          "ipg",               base + 0x6c, 10);
>  	clk[esai]         = imx_clk_gate2("esai",          "esai_podf",         base + 0x6c, 16);
>  	clk[gpt_ipg]      = imx_clk_gate2("gpt_ipg",       "ipg",               base + 0x6c, 20);
> -- 
> 1.8.5.1
> 
> 
>
Vladimir Zapolskiy - April 17, 2014, 12:41 p.m.
On 04/16/14 21:33, Iain Paton wrote:
> Compared to i.MX6 Quad/Dual the CCM_CCGR1 register in the i.MX6 Solo/DualLite
> replaces the ecspi5 clock with the i2c4 clock.
>
> Handle this difference using cpu_is_imx6dl().
>
> Signed-off-by: Iain Paton<ipaton0@gmail.com>
> ---
>   arch/arm/mach-imx/clk-imx6q.c | 8 +++++++-
>   1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
> index b0e7f9d..2961b16 100644
> --- a/arch/arm/mach-imx/clk-imx6q.c
> +++ b/arch/arm/mach-imx/clk-imx6q.c
> @@ -352,7 +352,13 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
>   	clk[ecspi2]       = imx_clk_gate2("ecspi2",        "ecspi_root",        base + 0x6c, 2);
>   	clk[ecspi3]       = imx_clk_gate2("ecspi3",        "ecspi_root",        base + 0x6c, 4);
>   	clk[ecspi4]       = imx_clk_gate2("ecspi4",        "ecspi_root",        base + 0x6c, 6);
> -	clk[ecspi5]       = imx_clk_gate2("ecspi5",        "ecspi_root",        base + 0x6c, 8);
> +	if (cpu_is_imx6dl())
> +		/*
> +		 * ecspi5 is replaced with i2c4 on imx6dl&  imx6s
> +		 */
> +		clk[ecspi5] = imx_clk_gate2("i2c4",        "ipg_per",           base + 0x6c, 8);

Is it good enough to reuse ecspi5 enum value here or may it be better to 
introduce a new one i2c4 equal to ecspi5?

> +	else
> +		clk[ecspi5] = imx_clk_gate2("ecspi5",      "ecspi_root",        base + 0x6c, 8);
>   	clk[enet]         = imx_clk_gate2("enet",          "ipg",               base + 0x6c, 10);
>   	clk[esai]         = imx_clk_gate2("esai",          "esai_podf",         base + 0x6c, 16);
>   	clk[gpt_ipg]      = imx_clk_gate2("gpt_ipg",       "ipg",               base + 0x6c, 20);

With best wishes,
Vladimir
Shawn Guo - April 17, 2014, 1 p.m.
On Thu, Apr 17, 2014 at 03:41:11PM +0300, Vladimir Zapolskiy wrote:
> On 04/16/14 21:33, Iain Paton wrote:
> >Compared to i.MX6 Quad/Dual the CCM_CCGR1 register in the i.MX6 Solo/DualLite
> >replaces the ecspi5 clock with the i2c4 clock.
> >
> >Handle this difference using cpu_is_imx6dl().
> >
> >Signed-off-by: Iain Paton<ipaton0@gmail.com>
> >---
> >  arch/arm/mach-imx/clk-imx6q.c | 8 +++++++-
> >  1 file changed, 7 insertions(+), 1 deletion(-)
> >
> >diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
> >index b0e7f9d..2961b16 100644
> >--- a/arch/arm/mach-imx/clk-imx6q.c
> >+++ b/arch/arm/mach-imx/clk-imx6q.c
> >@@ -352,7 +352,13 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
> >  	clk[ecspi2]       = imx_clk_gate2("ecspi2",        "ecspi_root",        base + 0x6c, 2);
> >  	clk[ecspi3]       = imx_clk_gate2("ecspi3",        "ecspi_root",        base + 0x6c, 4);
> >  	clk[ecspi4]       = imx_clk_gate2("ecspi4",        "ecspi_root",        base + 0x6c, 6);
> >-	clk[ecspi5]       = imx_clk_gate2("ecspi5",        "ecspi_root",        base + 0x6c, 8);
> >+	if (cpu_is_imx6dl())
> >+		/*
> >+		 * ecspi5 is replaced with i2c4 on imx6dl&  imx6s
> >+		 */
> >+		clk[ecspi5] = imx_clk_gate2("i2c4",        "ipg_per",           base + 0x6c, 8);
> 
> Is it good enough to reuse ecspi5 enum value here or may it be
> better to introduce a new one i2c4 equal to ecspi5?

With the comment in there, it's just fine to reuse the enum, I think.

Shawn

> 
> >+	else
> >+		clk[ecspi5] = imx_clk_gate2("ecspi5",      "ecspi_root",        base + 0x6c, 8);
> >  	clk[enet]         = imx_clk_gate2("enet",          "ipg",               base + 0x6c, 10);
> >  	clk[esai]         = imx_clk_gate2("esai",          "esai_podf",         base + 0x6c, 16);
> >  	clk[gpt_ipg]      = imx_clk_gate2("gpt_ipg",       "ipg",               base + 0x6c, 20);
> 
> With best wishes,
> Vladimir
> 
>
Iain Paton - April 18, 2014, 1:25 p.m.
On 17/04/14 14:00, Shawn Guo wrote:
> On Thu, Apr 17, 2014 at 03:41:11PM +0300, Vladimir Zapolskiy wrote:
>> On 04/16/14 21:33, Iain Paton wrote:
>>> -	clk[ecspi5]       = imx_clk_gate2("ecspi5",        "ecspi_root",        base + 0x6c, 8);
>>> +	if (cpu_is_imx6dl())
>>> +		/*
>>> +		 * ecspi5 is replaced with i2c4 on imx6dl&  imx6s
>>> +		 */
>>> +		clk[ecspi5] = imx_clk_gate2("i2c4",        "ipg_per",           base + 0x6c, 8);
>>
>> Is it good enough to reuse ecspi5 enum value here or may it be
>> better to introduce a new one i2c4 equal to ecspi5?
> 
> With the comment in there, it's just fine to reuse the enum, I think.

I wasn't sure about that, but couldn't find anywhere else the enum was used. In 
the dts the clock is simply referenced as <&clks 116> so you have to work that
back manually.

If you think it's worth it to add something to 
Documentation/devicetree/bindings/clock/imx6q-clock.txt so that the difference 
is documented I can send a patch for that.

Iain

Patch

diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index b0e7f9d..2961b16 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -352,7 +352,13 @@  static void __init imx6q_clocks_init(struct device_node *ccm_node)
 	clk[ecspi2]       = imx_clk_gate2("ecspi2",        "ecspi_root",        base + 0x6c, 2);
 	clk[ecspi3]       = imx_clk_gate2("ecspi3",        "ecspi_root",        base + 0x6c, 4);
 	clk[ecspi4]       = imx_clk_gate2("ecspi4",        "ecspi_root",        base + 0x6c, 6);
-	clk[ecspi5]       = imx_clk_gate2("ecspi5",        "ecspi_root",        base + 0x6c, 8);
+	if (cpu_is_imx6dl())
+		/*
+		 * ecspi5 is replaced with i2c4 on imx6dl & imx6s
+		 */
+		clk[ecspi5] = imx_clk_gate2("i2c4",        "ipg_per",           base + 0x6c, 8);
+	else
+		clk[ecspi5] = imx_clk_gate2("ecspi5",      "ecspi_root",        base + 0x6c, 8);
 	clk[enet]         = imx_clk_gate2("enet",          "ipg",               base + 0x6c, 10);
 	clk[esai]         = imx_clk_gate2("esai",          "esai_podf",         base + 0x6c, 16);
 	clk[gpt_ipg]      = imx_clk_gate2("gpt_ipg",       "ipg",               base + 0x6c, 20);