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[81.138.205.228]) by mx.google.com with ESMTPSA id km2sm28865972wjb.13.2014.04.15.02.15.30 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 15 Apr 2014 02:15:30 -0700 (PDT) Message-ID: <534CF8A3.3010404@gmail.com> Date: Tue, 15 Apr 2014 10:15:15 +0100 From: Iain Paton User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:16.0) Gecko/20121011 Thunderbird/16.0.1 MIME-Version: 1.0 To: linux-arm-kernel@lists.infradead.org, Shawn Guo , Sascha Hauer Subject: [RFC PATCH] imx6: imx6duallite/solo i2c4 clock X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140415_021554_814834_00335A2E X-CRM114-Status: GOOD ( 15.21 ) X-Spam-Score: 0.1 (/) X-Spam-Report: SpamAssassin version 3.3.2 on bombadil.infradead.org summary: Content analysis details: (0.1 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (ipaton0[at]gmail.com) 0.2 FREEMAIL_ENVFROM_END_DIGIT Envelope-from freemail username ends in digit (ipaton0[at]gmail.com) -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid Cc: =?ISO-8859-1?Q?Eric_B=E9nard?= X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.15 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org I'm working on a board using the imx6solo that implements i2c4 and while building the devicetree it became clear that the devicetree fragment for i2c4 in imx6dl.dtsi it's missing the necessary clock. Investigating further turned up that the ecspi5 clock in CCM_CCGR1 on the quad/dual is replaced with the i2c4 clock on duallite/solo. Would the following patch be sufficient to allow correct use of this clock? I'm not familiar enough with the clock framework to be sure I'm not missing something here, but have tested this patch on the board and found it to work. The board is element14's RIoTboard http://www.riotboard.org and I have dts mostly ready to submit for it pending resolving this and a couple of other minor things, and assuming Eric doesn't beat me to it. Iain diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c index b0e7f9d..2961b16 100644 --- a/arch/arm/mach-imx/clk-imx6q.c +++ b/arch/arm/mach-imx/clk-imx6q.c @@ -352,7 +352,13 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node) clk[ecspi2] = imx_clk_gate2("ecspi2", "ecspi_root", base + 0x6c, 2); clk[ecspi3] = imx_clk_gate2("ecspi3", "ecspi_root", base + 0x6c, 4); clk[ecspi4] = imx_clk_gate2("ecspi4", "ecspi_root", base + 0x6c, 6); - clk[ecspi5] = imx_clk_gate2("ecspi5", "ecspi_root", base + 0x6c, 8); + if (cpu_is_imx6dl()) + /* + * ecspi5 is replaced with i2c4 on imx6dl & imx6s + */ + clk[ecspi5] = imx_clk_gate2("i2c4", "ipg_per", base + 0x6c, 8); + else + clk[ecspi5] = imx_clk_gate2("ecspi5", "ecspi_root", base + 0x6c, 8); clk[enet] = imx_clk_gate2("enet", "ipg", base + 0x6c, 10); clk[esai] = imx_clk_gate2("esai", "esai_podf", base + 0x6c, 16); clk[gpt_ipg] = imx_clk_gate2("gpt_ipg", "ipg", base + 0x6c, 20);