| Message ID | 533AD1B3.5090104@redhat.com |
|---|---|
| State | New |
| Headers | show |
On Tue, Apr 1, 2014 at 7:48 AM, Richard Henderson <rth@redhat.com> wrote: > Yet more fallout from my float->int changes. > > This time the failure is during sched1, where we try to constrain_operands to > figure out what the sched parameters are for the insn. Except that since this > is before register allocation, where we are going to force the operand to > memory, there were no alternatives that match. > > This seems a bit of a hacky solution, keeping the register alternative enabled > until we get to register allocation, but it's restricted in scope to the i386 > backend and thus gets extra points at this stage. > > Another possibility is to have constrain_alternatives randomly pick an > alternative, assuming the register allocator will DTRT or barf later. > > Thoughts? Shouldn't it include the testcase?
On 04/01/2014 08:22 AM, H.J. Lu wrote: > On Tue, Apr 1, 2014 at 7:48 AM, Richard Henderson <rth@redhat.com> wrote: >> Yet more fallout from my float->int changes. >> >> This time the failure is during sched1, where we try to constrain_operands to >> figure out what the sched parameters are for the insn. Except that since this >> is before register allocation, where we are going to force the operand to >> memory, there were no alternatives that match. >> >> This seems a bit of a hacky solution, keeping the register alternative enabled >> until we get to register allocation, but it's restricted in scope to the i386 >> backend and thus gets extra points at this stage. >> >> Another possibility is to have constrain_alternatives randomly pick an >> alternative, assuming the register allocator will DTRT or barf later. >> >> Thoughts? > > Shouldn't it include the testcase? Oops. Forgot to add the file to the commit. Now done. r~
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index ca16173..25e2e93 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -4739,8 +4739,13 @@ && X87_ENABLE_FLOAT (<MODEF:MODE>mode, <SWI48:MODE>mode)") (eq_attr "alternative" "1") + /* ??? For sched1 we need constrain_operands to be able to + select an alternative. Leave this enabled before RA. */ (symbol_ref "TARGET_INTER_UNIT_CONVERSIONS - || optimize_function_for_size_p (cfun)") + || optimize_function_for_size_p (cfun) + || !(reload_completed + || reload_in_progress + || lra_in_progress)") ] (symbol_ref "true"))) ])
Yet more fallout from my float->int changes. This time the failure is during sched1, where we try to constrain_operands to figure out what the sched parameters are for the insn. Except that since this is before register allocation, where we are going to force the operand to memory, there were no alternatives that match. This seems a bit of a hacky solution, keeping the register alternative enabled until we get to register allocation, but it's restricted in scope to the i386 backend and thus gets extra points at this stage. Another possibility is to have constrain_alternatives randomly pick an alternative, assuming the register allocator will DTRT or barf later. Thoughts? r~ PR target/60704 * config/i386/i386.md (*float<SWI48><MODEF>2_sse): Leave the second alternative enabled before register allocation.