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[U-Boot] powerpc/85xx: Fix e6500 L2 cache stash IDs

Message ID 1395883856-13444-1-git-send-email-scottwood@freescale.com
State Accepted
Delegated to: York Sun
Headers show

Commit Message

Scott Wood March 27, 2014, 1:30 a.m. UTC 
The value written to L2CSR1 didn't match the value written to the
device tree.

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/cpu/mpc85xx/fdt.c | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

Comments

York Sun April 23, 2014, 10:32 p.m. UTC | #1 
On 03/26/2014 06:30 PM, Scott Wood wrote:
> The value written to L2CSR1 didn't match the value written to the
> device tree.
> 
> Signed-off-by: Scott Wood <scottwood@freescale.com>
> ---

Applied to u-boot-mpc85xx/master, thanks.

York
diff mbox

Patch

diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c
index 33bc900..31e63f7 100644
--- a/arch/powerpc/cpu/mpc85xx/fdt.c
+++ b/arch/powerpc/cpu/mpc85xx/fdt.c
@@ -275,12 +275,16 @@  static inline void ft_fixup_l2cache(void *blob)
 			u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0);
 #if defined(CONFIG_SYS_FSL_QORIQ_CHASSIS2) && defined(CONFIG_E6500)
 			/* Only initialize every eighth thread */
-			if (reg && !((*reg) % 8))
+			if (reg && !((*reg) % 8)) {
+				fdt_setprop_cell(blob, l2_off, "cache-stash-id",
+						 (*reg / 4) + 32 + 1);
+			}
 #else
-			if (reg)
-#endif
+			if (reg) {
 				fdt_setprop_cell(blob, l2_off, "cache-stash-id",
-					 (*reg * 2) + 32 + 1);
+						 (*reg * 2) + 32 + 1);
+			}
+#endif
 #endif
 
 			fdt_setprop(blob, l2_off, "cache-unified", NULL, 0);