Patchwork S/390: Fix FPR restores with shrink wrapping on 31bit zarch

login
register
mail settings
Submitter Andreas Krebbel
Date March 26, 2014, 12:11 p.m.
Message ID <20140326121109.GA957@bart>
Download mbox | patch
Permalink /patch/333838/
State New
Headers show

Comments

Andreas Krebbel - March 26, 2014, 12:11 p.m.
Hi,

in the attached testcase the restore of f4 gets dropped when compiled
with -m31 -mzarch.  The problem is that s390_can_use_return_insn lacks
a check for f4 and f6 which are call-saved on 31 bit.

Bootstraps on s390 and s390x are still running.  I'll commit it
afterwards.

This fixes a miscompile of the 433.milc SpecCPU testcase.

Bye,

-Andreas-


2014-03-26  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* config/s390/s390.c (s390_can_use_return_insn): Check for
	call-saved FPRs on 31 bit.

2014-03-26  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>

	* gcc.target/s390/20140326-1.c: New testcase.

Patch

diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c
index 7a79286..bdb577c 100644
--- a/gcc/config/s390/s390.c
+++ b/gcc/config/s390/s390.c
@@ -9225,6 +9225,13 @@  s390_can_use_return_insn (void)
     if (cfun_gpr_save_slot (i))
       return false;
 
+  /* For 31 bit this is not covered by the frame_size check below
+     since f4, f6 are saved in the register save area without needing
+     additional stack space.  */
+  if (!TARGET_64BIT
+      && (cfun_fpr_save_p (FPR4_REGNUM) || cfun_fpr_save_p (FPR6_REGNUM)))
+    return false;
+
   if (cfun->machine->base_reg
       && !call_really_used_regs[REGNO (cfun->machine->base_reg)])
     return false;
diff --git a/gcc/testsuite/gcc.target/s390/20140326-1.c b/gcc/testsuite/gcc.target/s390/20140326-1.c
new file mode 100644
index 0000000..f71c38f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/20140326-1.c
@@ -0,0 +1,10 @@ 
+/* { dg-do compile } */
+/* { dg-options "-O3 -m31 -mzarch" } */
+
+void
+foo ()
+{
+  asm ("" ::: "%f4");
+}
+
+/* { dg-final { scan-assembler "ld" } } */