[v5,7/7] allwinner-emac: update irq status after writes to interrupt registers

Message ID 1395771730-16882-8-git-send-email-b.galvani@gmail.com
State New
Headers show

Commit Message

Beniamino Galvani March 25, 2014, 6:22 p.m.
The irq line status must be updated after writes to the INT_CTL and
INT_STA registers.

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
 hw/net/allwinner_emac.c |    2 ++
 1 file changed, 2 insertions(+)


diff --git a/hw/net/allwinner_emac.c b/hw/net/allwinner_emac.c
index 91931ac..d780ba0 100644
--- a/hw/net/allwinner_emac.c
+++ b/hw/net/allwinner_emac.c
@@ -391,9 +391,11 @@  static void aw_emac_write(void *opaque, hwaddr offset, uint64_t value,
     case EMAC_INT_CTL_REG:
         s->int_ctl = value;
+        aw_emac_update_irq(s);
     case EMAC_INT_STA_REG:
         s->int_sta &= ~value;
+        aw_emac_update_irq(s);
     case EMAC_MAC_MADR_REG:
         s->phy_target = value;