From patchwork Tue Mar 25 08:13:33 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhenqiang Chen X-Patchwork-Id: 333312 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 6C7DD140090 for ; Tue, 25 Mar 2014 19:13:45 +1100 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:date:message-id:subject:from:to:cc:content-type; q=dns; s=default; b=GR4EokVxYRn0H/oxq6l+FfYLsfyyFOZm689p0uFOD13 oKZYDLyIwDXZTw+T/y4/Q66ZoLgnaGgqE3/H2TSJrd71KoK0kpJfHDzEtqG1n/bK 6tCXXUAUlEhjPWbKiEG6NfhwwsWZ0/bjwJyn6fFHTYnkOqKQpfUTDA8JTY/Ii1yA = DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:date:message-id:subject:from:to:cc:content-type; s=default; bh=UShvKefOjSZ/pXBJjXqUUmAJLwE=; b=fn0lOIKFZBDqeigl9 11pl3x9Z050SF6p07QRVIWqPuk23Umqwh5eSahGpyleUdoHuoU3i3lvbwLJcGPZh 9V3Xv3JWENmBPga0wXbuvx/J/sQbBnEHAqwaUkkBPhpGCO/6xKXNnC+vWqK5xz+/ 1xxAsYZZz6hgnWBGcU2n/8FvDs= Received: (qmail 11801 invoked by alias); 25 Mar 2014 08:13:38 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 11790 invoked by uid 89); 25 Mar 2014 08:13:37 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.5 required=5.0 tests=AWL, BAYES_00, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-la0-f44.google.com Received: from mail-la0-f44.google.com (HELO mail-la0-f44.google.com) (209.85.215.44) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Tue, 25 Mar 2014 08:13:36 +0000 Received: by mail-la0-f44.google.com with SMTP id hr13so86362lab.3 for ; Tue, 25 Mar 2014 01:13:33 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:date:message-id:subject:from:to:cc :content-type; bh=cylyg/xf9Dj0cw6MzGMH8OMBvw96N3oy6BO6TWvFZpM=; b=dyPbNwwMD/67QhjejmLucKHd2EwG64b7YZ3Hd9SOFmWjH4ceDLoh34WFlar7oZixfq cHwlCwIYH+yr5G2ARQ2bz3r4Rmv3YG/j/AXTscjB159wmBsmc1W4317Q68Q3pYu3FFv/ 15SEQVM6IdxAuTG7t71Z+Hsj0vIKWoN16L3pVXd5Emls5kI/2fuQzVZVTUXOMw7gWKKJ /OT6lpvY0h64B6V4BikmlxwLJNVD4BHg3YTk8BPaVMa2hy4SrPDn4AkEQSu9+ldabMoF jHd6ctVbIB4M2OH8boMih9+R47ZiJK/iAPxBJIlBfVsKOFjpgKolk3XZKuDAx/YlxdOl NdtA== X-Gm-Message-State: ALoCoQmQnJJ6gbBWuIKdEGgRZ3KTkbrOj1zVTQutGY/A0nOSxM535IdqMIWxNu7dCnxsR7sTaHn9 MIME-Version: 1.0 X-Received: by 10.153.7.200 with SMTP id de8mr48995348lad.19.1395735213273; Tue, 25 Mar 2014 01:13:33 -0700 (PDT) Received: by 10.112.135.105 with HTTP; Tue, 25 Mar 2014 01:13:33 -0700 (PDT) Date: Tue, 25 Mar 2014 16:13:33 +0800 Message-ID: Subject: [PATCH, ARM] Enable shrink-wrap for apcs frame From: Zhenqiang Chen To: "gcc-patches@gcc.gnu.org" Cc: Ramana Radhakrishnan X-IsSubscribed: yes Hi The patch enables shrink-wrap for apcs frame. Bootstrap and no make check regression in ARM, THUMB1 and THUMB2 modes. No make check regression with "-g/-mapcs/-marm". Build linux-3.14-rc7 without error. Is it OK for next stage1? Thanks! -Zhenqiang ChangeLog: 2014-03-25 Zhenqiang Chen * config/arm/arm.c (arm_option_override): Enable shrink-wrap for TARGET_APCS_FRAME. (arm_emit_multi_reg_pop): Set correct dwarf info. (arm_expand_epilogue_apcs_frame): Add more dwarf info. testsuite/ChangeLog: 2014-03-25 Zhenqiang Chen * gcc.target/arm/shrink-wrap-alloca.c: New test case. * gcc.target/arm/shrink-wrap-sibcall.c: New test case. diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 0240cc7..fa86942 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -2811,9 +2811,6 @@ arm_option_override (void) generate additional returns. */ if (optimize_function_for_size_p (cfun) && TARGET_THUMB2) flag_shrink_wrap = false; - /* TBD: Dwarf info for apcs frame is not handled yet. */ - if (TARGET_APCS_FRAME) - flag_shrink_wrap = false; /* We only support -mslow-flash-data on armv7-m targets. */ if (target_slow_flash_data @@ -19840,7 +19837,14 @@ arm_emit_multi_reg_pop (unsigned long saved_regs_mask) par = emit_insn (par); REG_NOTES (par) = dwarf; - if (!return_in_pc) + + if (!emit_update) + { + /* SP is restored from stack. So reset the frame info. */ + RTX_FRAME_RELATED_P (par) = 1; + add_reg_note (par, REG_CFA_DEF_CFA, stack_pointer_rtx); + } + else if (!return_in_pc) arm_add_cfa_adjust_cfa_note (par, UNITS_PER_WORD * num_regs, stack_pointer_rtx, stack_pointer_rtx); } @@ -27226,6 +27230,9 @@ arm_expand_epilogue_apcs_frame (bool really_return) REG_NOTES (insn) = alloc_reg_note (REG_CFA_RESTORE, gen_rtx_REG (SImode, IP_REGNUM), NULL_RTX); + arm_add_cfa_adjust_cfa_note (insn, UNITS_PER_WORD, + stack_pointer_rtx, + stack_pointer_rtx); } if (!really_return || (saved_regs_mask & (1 << PC_REGNUM))) diff --git a/gcc/testsuite/gcc.target/arm/shrink-wrap-alloca.c b/gcc/testsuite/gcc.target/arm/shrink-wrap-alloca.c new file mode 100644 index 0000000..318240b --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/shrink-wrap-alloca.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -g -mapcs " } */ + +int *p; + +void +test (int a) +{ + if (a > 0) + p = __builtin_alloca (4); +} diff --git a/gcc/testsuite/gcc.target/arm/shrink-wrap-sibcall.c b/gcc/testsuite/gcc.target/arm/shrink-wrap-sibcall.c new file mode 100644 index 0000000..2efe5d0 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/shrink-wrap-sibcall.c @@ -0,0 +1,26 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -g -mapcs " } */ + +unsigned char a, b, d, f, g; + +int test (void); + +int +baz (int c) +{ + if (c == 0) return test (); + if (b & 1) + { + g = 0; + int e = (a & 0x0f) - (g & 0x0f); + + if (!a) b |= 0x80; + a = e + test (); + f = g/5 + a*3879 + b *2985; + } + else + { + f = g + a*39879 + b *25; + } + return test (); +}