Patchwork [ARM] Enable shrink-wrap for apcs frame

login
register
mail settings
Submitter Zhenqiang Chen
Date March 25, 2014, 8:13 a.m.
Message ID <CACgzC7DzK8Y3TP5-dmV_sj=jb83zYTrpsGosMo862Ycnf6y69Q@mail.gmail.com>
Download mbox | patch
Permalink /patch/333312/
State New
Headers show

Comments

Zhenqiang Chen - March 25, 2014, 8:13 a.m.
Hi

The patch enables shrink-wrap for apcs frame.

Bootstrap and no make check regression in ARM, THUMB1 and THUMB2 modes.
No make check regression with "-g/-mapcs/-marm".
Build linux-3.14-rc7 without error.

Is it OK for next stage1?

Thanks!
-Zhenqiang

ChangeLog:
2014-03-25  Zhenqiang Chen  <zhenqiang.chen@linaro.org>

        * config/arm/arm.c (arm_option_override): Enable shrink-wrap for
        TARGET_APCS_FRAME.
        (arm_emit_multi_reg_pop): Set correct dwarf info.
        (arm_expand_epilogue_apcs_frame): Add more dwarf info.

testsuite/ChangeLog:
2014-03-25  Zhenqiang Chen  <zhenqiang.chen@linaro.org>

        * gcc.target/arm/shrink-wrap-alloca.c: New test case.
        * gcc.target/arm/shrink-wrap-sibcall.c: New test case.
Richard Earnshaw - May 13, 2014, 12:56 p.m.
On 25/03/14 08:13, Zhenqiang Chen wrote:
> Hi
> 
> The patch enables shrink-wrap for apcs frame.
> 
> Bootstrap and no make check regression in ARM, THUMB1 and THUMB2 modes.
> No make check regression with "-g/-mapcs/-marm".
> Build linux-3.14-rc7 without error.
> 
> Is it OK for next stage1?
> 
> Thanks!
> -Zhenqiang
> 
> ChangeLog:
> 2014-03-25  Zhenqiang Chen  <zhenqiang.chen@linaro.org>
> 
>         * config/arm/arm.c (arm_option_override): Enable shrink-wrap for
>         TARGET_APCS_FRAME.
>         (arm_emit_multi_reg_pop): Set correct dwarf info.
>         (arm_expand_epilogue_apcs_frame): Add more dwarf info.
> 
> testsuite/ChangeLog:
> 2014-03-25  Zhenqiang Chen  <zhenqiang.chen@linaro.org>
> 
>         * gcc.target/arm/shrink-wrap-alloca.c: New test case.
>         * gcc.target/arm/shrink-wrap-sibcall.c: New test case.
> 
> diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
> index 0240cc7..fa86942 100644
> --- a/gcc/config/arm/arm.c
> +++ b/gcc/config/arm/arm.c
> @@ -2811,9 +2811,6 @@ arm_option_override (void)
>       generate additional returns.  */
>    if (optimize_function_for_size_p (cfun) && TARGET_THUMB2)
>      flag_shrink_wrap = false;
> -  /* TBD: Dwarf info for apcs frame is not handled yet.  */
> -  if (TARGET_APCS_FRAME)
> -    flag_shrink_wrap = false;
> 
>    /* We only support -mslow-flash-data on armv7-m targets.  */
>    if (target_slow_flash_data
> @@ -19840,7 +19837,14 @@ arm_emit_multi_reg_pop (unsigned long saved_regs_mask)
>      par = emit_insn (par);
> 
>    REG_NOTES (par) = dwarf;
> -  if (!return_in_pc)
> +
> +  if (!emit_update)
> +    {
> +      /* SP is restored from stack.  So reset the frame info.  */
> +      RTX_FRAME_RELATED_P (par) = 1;
> +      add_reg_note (par, REG_CFA_DEF_CFA, stack_pointer_rtx);
> +    }
> +  else if (!return_in_pc)
>      arm_add_cfa_adjust_cfa_note (par, UNITS_PER_WORD * num_regs,
>                   stack_pointer_rtx, stack_pointer_rtx);
>  }
> @@ -27226,6 +27230,9 @@ arm_expand_epilogue_apcs_frame (bool really_return)
>        REG_NOTES (insn) = alloc_reg_note (REG_CFA_RESTORE,
>                                           gen_rtx_REG (SImode, IP_REGNUM),
>                                           NULL_RTX);
> +      arm_add_cfa_adjust_cfa_note (insn, UNITS_PER_WORD,
> +                   stack_pointer_rtx,
> +                   stack_pointer_rtx);

This can't be related to $SUBJECT, surely?  Shrink-wrapping an interrupt
routine?

If this is as I think, please resubmit that part as a separate patch.

The other changes look ok.

R.

>      }
> 
>    if (!really_return || (saved_regs_mask & (1 << PC_REGNUM)))
> diff --git a/gcc/testsuite/gcc.target/arm/shrink-wrap-alloca.c
> b/gcc/testsuite/gcc.target/arm/shrink-wrap-alloca.c
> new file mode 100644
> index 0000000..318240b
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/arm/shrink-wrap-alloca.c
> @@ -0,0 +1,11 @@
> +/* { dg-do compile } */
> +/* { dg-options "-O2 -g -mapcs " } */
> +
> +int *p;
> +
> +void
> +test (int a)
> +{
> +  if (a > 0)
> +    p = __builtin_alloca (4);
> +}
> diff --git a/gcc/testsuite/gcc.target/arm/shrink-wrap-sibcall.c
> b/gcc/testsuite/gcc.target/arm/shrink-wrap-sibcall.c
> new file mode 100644
> index 0000000..2efe5d0
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/arm/shrink-wrap-sibcall.c
> @@ -0,0 +1,26 @@
> +/* { dg-do compile } */
> +/* { dg-options "-O2 -g -mapcs " } */
> +
> +unsigned char a, b, d, f, g;
> +
> +int test (void);
> +
> +int
> +baz (int c)
> +{
> +  if (c == 0) return test ();
> +  if (b & 1)
> +    {
> +      g = 0;
> +      int e = (a & 0x0f) - (g & 0x0f);
> +
> +      if (!a)  b |= 0x80;
> +      a = e + test ();
> +     f = g/5 + a*3879 + b *2985;
> +    }
> +   else
> +   {
> +     f = g + a*39879 + b *25;
> +   }
> +  return test ();
> +}
>
Zhenqiang Chen - May 14, 2014, 7:14 a.m.
On 13 May 2014 20:56, Richard Earnshaw <rearnsha@arm.com> wrote:
> On 25/03/14 08:13, Zhenqiang Chen wrote:
>> Hi
>>
>> The patch enables shrink-wrap for apcs frame.
>>
>> Bootstrap and no make check regression in ARM, THUMB1 and THUMB2 modes.
>> No make check regression with "-g/-mapcs/-marm".
>> Build linux-3.14-rc7 without error.
>>
>> Is it OK for next stage1?
>>
>> Thanks!
>> -Zhenqiang
>>
>> ChangeLog:
>> 2014-03-25  Zhenqiang Chen  <zhenqiang.chen@linaro.org>
>>
>>         * config/arm/arm.c (arm_option_override): Enable shrink-wrap for
>>         TARGET_APCS_FRAME.
>>         (arm_emit_multi_reg_pop): Set correct dwarf info.
>>         (arm_expand_epilogue_apcs_frame): Add more dwarf info.
>>
>> testsuite/ChangeLog:
>> 2014-03-25  Zhenqiang Chen  <zhenqiang.chen@linaro.org>
>>
>>         * gcc.target/arm/shrink-wrap-alloca.c: New test case.
>>         * gcc.target/arm/shrink-wrap-sibcall.c: New test case.
>>
>> diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
>> index 0240cc7..fa86942 100644
>> --- a/gcc/config/arm/arm.c
>> +++ b/gcc/config/arm/arm.c
>> @@ -2811,9 +2811,6 @@ arm_option_override (void)
>>       generate additional returns.  */
>>    if (optimize_function_for_size_p (cfun) && TARGET_THUMB2)
>>      flag_shrink_wrap = false;
>> -  /* TBD: Dwarf info for apcs frame is not handled yet.  */
>> -  if (TARGET_APCS_FRAME)
>> -    flag_shrink_wrap = false;
>>
>>    /* We only support -mslow-flash-data on armv7-m targets.  */
>>    if (target_slow_flash_data
>> @@ -19840,7 +19837,14 @@ arm_emit_multi_reg_pop (unsigned long saved_regs_mask)
>>      par = emit_insn (par);
>>
>>    REG_NOTES (par) = dwarf;
>> -  if (!return_in_pc)
>> +
>> +  if (!emit_update)
>> +    {
>> +      /* SP is restored from stack.  So reset the frame info.  */
>> +      RTX_FRAME_RELATED_P (par) = 1;
>> +      add_reg_note (par, REG_CFA_DEF_CFA, stack_pointer_rtx);
>> +    }
>> +  else if (!return_in_pc)
>>      arm_add_cfa_adjust_cfa_note (par, UNITS_PER_WORD * num_regs,
>>                   stack_pointer_rtx, stack_pointer_rtx);
>>  }
>> @@ -27226,6 +27230,9 @@ arm_expand_epilogue_apcs_frame (bool really_return)
>>        REG_NOTES (insn) = alloc_reg_note (REG_CFA_RESTORE,
>>                                           gen_rtx_REG (SImode, IP_REGNUM),
>>                                           NULL_RTX);
>> +      arm_add_cfa_adjust_cfa_note (insn, UNITS_PER_WORD,
>> +                   stack_pointer_rtx,
>> +                   stack_pointer_rtx);
>
> This can't be related to $SUBJECT, surely?  Shrink-wrapping an interrupt
> routine?

From middle-end view, shrink-wrapping does not distinguish an
interrupt routine from general routines. But I am not quite sure there
is dwarf info issue for interrupt route or not.

I am running regression test. If it does not impact on the result, I
will remove the code segment.

Thanks!
-Zhenqiang

> If this is as I think, please resubmit that part as a separate patch.
>
> The other changes look ok.
>
> R.
>
>>      }
>>
>>    if (!really_return || (saved_regs_mask & (1 << PC_REGNUM)))
>> diff --git a/gcc/testsuite/gcc.target/arm/shrink-wrap-alloca.c
>> b/gcc/testsuite/gcc.target/arm/shrink-wrap-alloca.c
>> new file mode 100644
>> index 0000000..318240b
>> --- /dev/null
>> +++ b/gcc/testsuite/gcc.target/arm/shrink-wrap-alloca.c
>> @@ -0,0 +1,11 @@
>> +/* { dg-do compile } */
>> +/* { dg-options "-O2 -g -mapcs " } */
>> +
>> +int *p;
>> +
>> +void
>> +test (int a)
>> +{
>> +  if (a > 0)
>> +    p = __builtin_alloca (4);
>> +}
>> diff --git a/gcc/testsuite/gcc.target/arm/shrink-wrap-sibcall.c
>> b/gcc/testsuite/gcc.target/arm/shrink-wrap-sibcall.c
>> new file mode 100644
>> index 0000000..2efe5d0
>> --- /dev/null
>> +++ b/gcc/testsuite/gcc.target/arm/shrink-wrap-sibcall.c
>> @@ -0,0 +1,26 @@
>> +/* { dg-do compile } */
>> +/* { dg-options "-O2 -g -mapcs " } */
>> +
>> +unsigned char a, b, d, f, g;
>> +
>> +int test (void);
>> +
>> +int
>> +baz (int c)
>> +{
>> +  if (c == 0) return test ();
>> +  if (b & 1)
>> +    {
>> +      g = 0;
>> +      int e = (a & 0x0f) - (g & 0x0f);
>> +
>> +      if (!a)  b |= 0x80;
>> +      a = e + test ();
>> +     f = g/5 + a*3879 + b *2985;
>> +    }
>> +   else
>> +   {
>> +     f = g + a*39879 + b *25;
>> +   }
>> +  return test ();
>> +}
>>
>
>
Zhenqiang Chen - May 15, 2014, 8:21 a.m.
On 13 May 2014 20:56, Richard Earnshaw <rearnsha@arm.com> wrote:
> On 25/03/14 08:13, Zhenqiang Chen wrote:
>> Hi
>>
>> The patch enables shrink-wrap for apcs frame.
>>
>> Bootstrap and no make check regression in ARM, THUMB1 and THUMB2 modes.
>> No make check regression with "-g/-mapcs/-marm".
>> Build linux-3.14-rc7 without error.
>>
>> Is it OK for next stage1?
>>
>> Thanks!
>> -Zhenqiang
>>
>> ChangeLog:
>> 2014-03-25  Zhenqiang Chen  <zhenqiang.chen@linaro.org>
>>
>>         * config/arm/arm.c (arm_option_override): Enable shrink-wrap for
>>         TARGET_APCS_FRAME.
>>         (arm_emit_multi_reg_pop): Set correct dwarf info.
>>         (arm_expand_epilogue_apcs_frame): Add more dwarf info.
>>
>> testsuite/ChangeLog:
>> 2014-03-25  Zhenqiang Chen  <zhenqiang.chen@linaro.org>
>>
>>         * gcc.target/arm/shrink-wrap-alloca.c: New test case.
>>         * gcc.target/arm/shrink-wrap-sibcall.c: New test case.
>>
>> diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
>> index 0240cc7..fa86942 100644
>> --- a/gcc/config/arm/arm.c
>> +++ b/gcc/config/arm/arm.c
>> @@ -2811,9 +2811,6 @@ arm_option_override (void)
>>       generate additional returns.  */
>>    if (optimize_function_for_size_p (cfun) && TARGET_THUMB2)
>>      flag_shrink_wrap = false;
>> -  /* TBD: Dwarf info for apcs frame is not handled yet.  */
>> -  if (TARGET_APCS_FRAME)
>> -    flag_shrink_wrap = false;
>>
>>    /* We only support -mslow-flash-data on armv7-m targets.  */
>>    if (target_slow_flash_data
>> @@ -19840,7 +19837,14 @@ arm_emit_multi_reg_pop (unsigned long saved_regs_mask)
>>      par = emit_insn (par);
>>
>>    REG_NOTES (par) = dwarf;
>> -  if (!return_in_pc)
>> +
>> +  if (!emit_update)
>> +    {
>> +      /* SP is restored from stack.  So reset the frame info.  */
>> +      RTX_FRAME_RELATED_P (par) = 1;
>> +      add_reg_note (par, REG_CFA_DEF_CFA, stack_pointer_rtx);
>> +    }
>> +  else if (!return_in_pc)
>>      arm_add_cfa_adjust_cfa_note (par, UNITS_PER_WORD * num_regs,
>>                   stack_pointer_rtx, stack_pointer_rtx);
>>  }
>> @@ -27226,6 +27230,9 @@ arm_expand_epilogue_apcs_frame (bool really_return)
>>        REG_NOTES (insn) = alloc_reg_note (REG_CFA_RESTORE,
>>                                           gen_rtx_REG (SImode, IP_REGNUM),
>>                                           NULL_RTX);
>> +      arm_add_cfa_adjust_cfa_note (insn, UNITS_PER_WORD,
>> +                   stack_pointer_rtx,
>> +                   stack_pointer_rtx);
>
> This can't be related to $SUBJECT, surely?  Shrink-wrapping an interrupt
> routine?
>
> If this is as I think, please resubmit that part as a separate patch.

Yip. gcc can Shrink-wrapping an interrupt routine (only ARM mode). I
can write a test case to produce it.

I will investigate interrupt related codes and resubmit a separate patch for it.

> The other changes look ok.

I will retest it. If there is no regression, I will commit it.

Thanks!
-Zhenqiang

>>      }
>>
>>    if (!really_return || (saved_regs_mask & (1 << PC_REGNUM)))
>> diff --git a/gcc/testsuite/gcc.target/arm/shrink-wrap-alloca.c
>> b/gcc/testsuite/gcc.target/arm/shrink-wrap-alloca.c
>> new file mode 100644
>> index 0000000..318240b
>> --- /dev/null
>> +++ b/gcc/testsuite/gcc.target/arm/shrink-wrap-alloca.c
>> @@ -0,0 +1,11 @@
>> +/* { dg-do compile } */
>> +/* { dg-options "-O2 -g -mapcs " } */
>> +
>> +int *p;
>> +
>> +void
>> +test (int a)
>> +{
>> +  if (a > 0)
>> +    p = __builtin_alloca (4);
>> +}
>> diff --git a/gcc/testsuite/gcc.target/arm/shrink-wrap-sibcall.c
>> b/gcc/testsuite/gcc.target/arm/shrink-wrap-sibcall.c
>> new file mode 100644
>> index 0000000..2efe5d0
>> --- /dev/null
>> +++ b/gcc/testsuite/gcc.target/arm/shrink-wrap-sibcall.c
>> @@ -0,0 +1,26 @@
>> +/* { dg-do compile } */
>> +/* { dg-options "-O2 -g -mapcs " } */
>> +
>> +unsigned char a, b, d, f, g;
>> +
>> +int test (void);
>> +
>> +int
>> +baz (int c)
>> +{
>> +  if (c == 0) return test ();
>> +  if (b & 1)
>> +    {
>> +      g = 0;
>> +      int e = (a & 0x0f) - (g & 0x0f);
>> +
>> +      if (!a)  b |= 0x80;
>> +      a = e + test ();
>> +     f = g/5 + a*3879 + b *2985;
>> +    }
>> +   else
>> +   {
>> +     f = g + a*39879 + b *25;
>> +   }
>> +  return test ();
>> +}
>>
>
>

Patch

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 0240cc7..fa86942 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -2811,9 +2811,6 @@  arm_option_override (void)
      generate additional returns.  */
   if (optimize_function_for_size_p (cfun) && TARGET_THUMB2)
     flag_shrink_wrap = false;
-  /* TBD: Dwarf info for apcs frame is not handled yet.  */
-  if (TARGET_APCS_FRAME)
-    flag_shrink_wrap = false;

   /* We only support -mslow-flash-data on armv7-m targets.  */
   if (target_slow_flash_data
@@ -19840,7 +19837,14 @@  arm_emit_multi_reg_pop (unsigned long saved_regs_mask)
     par = emit_insn (par);

   REG_NOTES (par) = dwarf;
-  if (!return_in_pc)
+
+  if (!emit_update)
+    {
+      /* SP is restored from stack.  So reset the frame info.  */
+      RTX_FRAME_RELATED_P (par) = 1;
+      add_reg_note (par, REG_CFA_DEF_CFA, stack_pointer_rtx);
+    }
+  else if (!return_in_pc)
     arm_add_cfa_adjust_cfa_note (par, UNITS_PER_WORD * num_regs,
                  stack_pointer_rtx, stack_pointer_rtx);
 }
@@ -27226,6 +27230,9 @@  arm_expand_epilogue_apcs_frame (bool really_return)
       REG_NOTES (insn) = alloc_reg_note (REG_CFA_RESTORE,
                                          gen_rtx_REG (SImode, IP_REGNUM),
                                          NULL_RTX);
+      arm_add_cfa_adjust_cfa_note (insn, UNITS_PER_WORD,
+                   stack_pointer_rtx,
+                   stack_pointer_rtx);
     }

   if (!really_return || (saved_regs_mask & (1 << PC_REGNUM)))
diff --git a/gcc/testsuite/gcc.target/arm/shrink-wrap-alloca.c
b/gcc/testsuite/gcc.target/arm/shrink-wrap-alloca.c
new file mode 100644
index 0000000..318240b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/shrink-wrap-alloca.c
@@ -0,0 +1,11 @@ 
+/* { dg-do compile } */
+/* { dg-options "-O2 -g -mapcs " } */
+
+int *p;
+
+void
+test (int a)
+{
+  if (a > 0)
+    p = __builtin_alloca (4);
+}
diff --git a/gcc/testsuite/gcc.target/arm/shrink-wrap-sibcall.c
b/gcc/testsuite/gcc.target/arm/shrink-wrap-sibcall.c
new file mode 100644
index 0000000..2efe5d0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/shrink-wrap-sibcall.c
@@ -0,0 +1,26 @@ 
+/* { dg-do compile } */
+/* { dg-options "-O2 -g -mapcs " } */
+
+unsigned char a, b, d, f, g;
+
+int test (void);
+
+int
+baz (int c)
+{
+  if (c == 0) return test ();
+  if (b & 1)
+    {
+      g = 0;
+      int e = (a & 0x0f) - (g & 0x0f);
+
+      if (!a)  b |= 0x80;
+      a = e + test ();
+     f = g/5 + a*3879 + b *2985;
+    }
+   else
+   {
+     f = g + a*39879 + b *25;
+   }
+  return test ();
+}