| Message ID | 532A6B26.1070705@samsung.com |
|---|---|
| State | Changes Requested |
| Delegated to: | Minkyu Kang |
| Headers | show |
Dear Beomho Seo, On 20/03/14 13:14, Beomho Seo wrote: > exynos4x12_set_mmc_clk function have been removed. > Because, exynos4x12_clock and exynos4_clock return smae div_fsys* value. typo, smae -> same? > > Signed-off-by: Beomho Seo <beomho.seo@samsung.com> > Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> > Tested-by: Piotr Wilczek <p.wilczek@samsung.com> > Cc: Lukasz Majewski <l.majewski@samsung.com> > Cc: Piotr Wilczek <p.wilczek@samsung.com> > Cc: Minkyu Kang <mk7.kang@samsung.com> > --- > Changes for v3: > - None. > > Changes for v2: > - None. > > arch/arm/cpu/armv7/exynos/clock.c | 29 +---------------------------- > 1 file changed, 1 insertion(+), 28 deletions(-) > > diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c > index 1fea4d6..2c2029a 100644 > --- a/arch/arm/cpu/armv7/exynos/clock.c > +++ b/arch/arm/cpu/armv7/exynos/clock.c > @@ -893,30 +893,6 @@ static void exynos4_set_mmc_clk(int dev_index, unsigned int div) > (div & 0xff) << ((dev_index << 4) + 8)); > } > > -/* exynos4x12: set the mmc clock */ > -static void exynos4x12_set_mmc_clk(int dev_index, unsigned int div) > -{ > - struct exynos4x12_clock *clk = > - (struct exynos4x12_clock *)samsung_get_base_clock(); > - unsigned int addr; > - > - /* > - * CLK_DIV_FSYS1 > - * MMC0_PRE_RATIO [15:8], MMC1_PRE_RATIO [31:24] > - * CLK_DIV_FSYS2 > - * MMC2_PRE_RATIO [15:8], MMC3_PRE_RATIO [31:24] > - */ > - if (dev_index < 2) { > - addr = (unsigned int)&clk->div_fsys1; > - } else { > - addr = (unsigned int)&clk->div_fsys2; > - dev_index -= 2; > - } > - > - clrsetbits_le32(addr, 0xff << ((dev_index << 4) + 8), > - (div & 0xff) << ((dev_index << 4) + 8)); > -} > - > /* exynos5: set the mmc clock */ > static void exynos5_set_mmc_clk(int dev_index, unsigned int div) > { > @@ -1612,10 +1588,7 @@ void set_mmc_clk(int dev_index, unsigned int div) > else > exynos5_set_mmc_clk(dev_index, div); > } else { > - if (proid_is_exynos4412()) > - exynos4x12_set_mmc_clk(dev_index, div); > - else > - exynos4_set_mmc_clk(dev_index, div); > + exynos4_set_mmc_clk(dev_index, div); > } > } > Thanks, Minkyu Kang.
On 04/08/2014 11:53 AM, Minkyu Kang wrote: > Dear Beomho Seo, > > On 20/03/14 13:14, Beomho Seo wrote: >> exynos4x12_set_mmc_clk function have been removed. >> Because, exynos4x12_clock and exynos4_clock return smae div_fsys* value. > > typo, smae -> same? > Thank you. I will fix this mistake. >> >> Signed-off-by: Beomho Seo <beomho.seo@samsung.com> >> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> >> Tested-by: Piotr Wilczek <p.wilczek@samsung.com> >> Cc: Lukasz Majewski <l.majewski@samsung.com> >> Cc: Piotr Wilczek <p.wilczek@samsung.com> >> Cc: Minkyu Kang <mk7.kang@samsung.com> >> --- >> Changes for v3: >> - None. >> >> Changes for v2: >> - None. >> >> arch/arm/cpu/armv7/exynos/clock.c | 29 +---------------------------- >> 1 file changed, 1 insertion(+), 28 deletions(-) >> >> diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c >> index 1fea4d6..2c2029a 100644 >> --- a/arch/arm/cpu/armv7/exynos/clock.c >> +++ b/arch/arm/cpu/armv7/exynos/clock.c >> @@ -893,30 +893,6 @@ static void exynos4_set_mmc_clk(int dev_index, unsigned int div) >> (div & 0xff) << ((dev_index << 4) + 8)); >> } >> >> -/* exynos4x12: set the mmc clock */ >> -static void exynos4x12_set_mmc_clk(int dev_index, unsigned int div) >> -{ >> - struct exynos4x12_clock *clk = >> - (struct exynos4x12_clock *)samsung_get_base_clock(); >> - unsigned int addr; >> - >> - /* >> - * CLK_DIV_FSYS1 >> - * MMC0_PRE_RATIO [15:8], MMC1_PRE_RATIO [31:24] >> - * CLK_DIV_FSYS2 >> - * MMC2_PRE_RATIO [15:8], MMC3_PRE_RATIO [31:24] >> - */ >> - if (dev_index < 2) { >> - addr = (unsigned int)&clk->div_fsys1; >> - } else { >> - addr = (unsigned int)&clk->div_fsys2; >> - dev_index -= 2; >> - } >> - >> - clrsetbits_le32(addr, 0xff << ((dev_index << 4) + 8), >> - (div & 0xff) << ((dev_index << 4) + 8)); >> -} >> - >> /* exynos5: set the mmc clock */ >> static void exynos5_set_mmc_clk(int dev_index, unsigned int div) >> { >> @@ -1612,10 +1588,7 @@ void set_mmc_clk(int dev_index, unsigned int div) >> else >> exynos5_set_mmc_clk(dev_index, div); >> } else { >> - if (proid_is_exynos4412()) >> - exynos4x12_set_mmc_clk(dev_index, div); >> - else >> - exynos4_set_mmc_clk(dev_index, div); >> + exynos4_set_mmc_clk(dev_index, div); >> } >> } >> > > Thanks, > Minkyu Kang. >
diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c index 1fea4d6..2c2029a 100644 --- a/arch/arm/cpu/armv7/exynos/clock.c +++ b/arch/arm/cpu/armv7/exynos/clock.c @@ -893,30 +893,6 @@ static void exynos4_set_mmc_clk(int dev_index, unsigned int div) (div & 0xff) << ((dev_index << 4) + 8)); } -/* exynos4x12: set the mmc clock */ -static void exynos4x12_set_mmc_clk(int dev_index, unsigned int div) -{ - struct exynos4x12_clock *clk = - (struct exynos4x12_clock *)samsung_get_base_clock(); - unsigned int addr; - - /* - * CLK_DIV_FSYS1 - * MMC0_PRE_RATIO [15:8], MMC1_PRE_RATIO [31:24] - * CLK_DIV_FSYS2 - * MMC2_PRE_RATIO [15:8], MMC3_PRE_RATIO [31:24] - */ - if (dev_index < 2) { - addr = (unsigned int)&clk->div_fsys1; - } else { - addr = (unsigned int)&clk->div_fsys2; - dev_index -= 2; - } - - clrsetbits_le32(addr, 0xff << ((dev_index << 4) + 8), - (div & 0xff) << ((dev_index << 4) + 8)); -} - /* exynos5: set the mmc clock */ static void exynos5_set_mmc_clk(int dev_index, unsigned int div) { @@ -1612,10 +1588,7 @@ void set_mmc_clk(int dev_index, unsigned int div) else exynos5_set_mmc_clk(dev_index, div); } else { - if (proid_is_exynos4412()) - exynos4x12_set_mmc_clk(dev_index, div); - else - exynos4_set_mmc_clk(dev_index, div); + exynos4_set_mmc_clk(dev_index, div); } }