Message ID | 000001cf418b$d7c909d0$875b1d70$@arm.com |
---|---|
State | New |
Headers | show |
On 17/03/14 02:51, Terry Guo wrote: > Hi, > > I am working on another patch and found this per-function variable isn't > correctly reset for Thumb1 target. Currently no ICE will be triggered > because we don't call function arm_split_constants for Thumb1 target. This > patch intends to define this variable in machine_function struct in arm.h. > In this way, the variable will be correctly reset and ready for being used > for Thumb1 target in future. > > Tested with gcc regression test for Thumb1 target cortex-m0. No new > regressions. > > Is it ok to trunk? > > BR, > Terry > > 2014-03-17 Terry Guo <terry.guo@arm.com> > > * config/arm/arm.h (machine_function): Define variable > after_arm_reorg here. > * config/arm/arm.c (after_arm_reorg): Remove the definition. > (arm_split_constant): Update the way to access variable > after_arm_reorg. > (arm_reorg): Ditto. > (arm_output_function_epilogue): Remove the reset of after_arm_reorg. > > > reset-after_arm_reorg-thumb1-v3.txt > > > diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h > index 7ca47a7..982ed48 100644 > --- a/gcc/config/arm/arm.h > +++ b/gcc/config/arm/arm.h > @@ -1543,6 +1543,9 @@ typedef struct GTY(()) machine_function > rtx thumb1_cc_op1; > /* Also record the CC mode that is supported. */ > enum machine_mode thumb1_cc_mode; > + /* Set to 1 after arm_reorg has started. Reset to 0 at the start of > + the next function. */ The reset comment is no-longer relevant. Please remove. Ok for stage1 with that change. R.
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index 7ca47a7..982ed48 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -1543,6 +1543,9 @@ typedef struct GTY(()) machine_function rtx thumb1_cc_op1; /* Also record the CC mode that is supported. */ enum machine_mode thumb1_cc_mode; + /* Set to 1 after arm_reorg has started. Reset to 0 at the start of + the next function. */ + int after_arm_reorg; } machine_function; #endif diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index a68ed8d..a6ea45b 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -880,10 +880,6 @@ enum machine_mode output_memory_reference_mode; /* The register number to be used for the PIC offset register. */ unsigned arm_pic_register = INVALID_REGNUM; -/* Set to 1 after arm_reorg has started. Reset to start at the start of - the next function. */ -static int after_arm_reorg = 0; - enum arm_pcs arm_pcs_default; /* For an explanation of these variables, see final_prescan_insn below. */ @@ -3372,7 +3368,7 @@ arm_split_constant (enum rtx_code code, enum machine_mode mode, rtx insn, Ref: gcc -O1 -mcpu=strongarm gcc.c-torture/compile/980506-2.c */ - if (!after_arm_reorg + if (!cfun->machine->after_arm_reorg && !cond && (arm_gen_constant (code, mode, NULL_RTX, val, target, source, 1, 0) @@ -17132,7 +17128,7 @@ arm_reorg (void) /* From now on we must synthesize any constants that we can't handle directly. This can happen if the RTL gets split during final instruction generation. */ - after_arm_reorg = 1; + cfun->machine->after_arm_reorg = 1; /* Free the minipool memory. */ obstack_free (&minipool_obstack, minipool_startobj); @@ -19281,9 +19277,6 @@ arm_output_function_epilogue (FILE *file ATTRIBUTE_UNUSED, || (cfun->machine->return_used_this_function != 0) || offsets->saved_regs == offsets->outgoing_args || frame_pointer_needed); - - /* Reset the ARM-specific per-function variables. */ - after_arm_reorg = 0; } }