From patchwork Fri Mar 14 05:00:32 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Ellerman X-Patchwork-Id: 330193 X-Patchwork-Delegate: michael@ellerman.id.au Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from ozlabs.org (localhost [IPv6:::1]) by ozlabs.org (Postfix) with ESMTP id 762A02C0189 for ; Fri, 14 Mar 2014 16:06:19 +1100 (EST) Received: by ozlabs.org (Postfix) id 0B8B22C0152; Fri, 14 Mar 2014 16:01:11 +1100 (EST) Delivered-To: linuxppc-dev@ozlabs.org Received: by ozlabs.org (Postfix, from userid 1034) id E8BB02C015D; Fri, 14 Mar 2014 16:01:10 +1100 (EST) From: Michael Ellerman To: Subject: [PATCH 07/20] powerpc/perf: Avoid mutating event in power8_get_constraint() Date: Fri, 14 Mar 2014 16:00:32 +1100 Message-Id: <1394773245-18328-8-git-send-email-mpe@ellerman.id.au> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1394773245-18328-1-git-send-email-mpe@ellerman.id.au> References: <1394773245-18328-1-git-send-email-mpe@ellerman.id.au> Cc: cody@linux.vnet.ibm.com, khandual@linux.vnet.ibm.com X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" We only need to mask the EBB bit out of the event for the check of the special PMC 5 & 6 events. So use a local to do it just for that code, rather than changing the event value for the life of the function. While we're there move the set of mask and value after all the checks. Signed-off-by: Michael Ellerman --- arch/powerpc/perf/power8-pmu.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/arch/powerpc/perf/power8-pmu.c b/arch/powerpc/perf/power8-pmu.c index 1d7c442..67aab10 100644 --- a/arch/powerpc/perf/power8-pmu.c +++ b/arch/powerpc/perf/power8-pmu.c @@ -270,18 +270,20 @@ static int power8_get_constraint(u64 event, unsigned long *maskp, unsigned long cache = (event >> EVENT_CACHE_SEL_SHIFT) & EVENT_CACHE_SEL_MASK; ebb = (event >> EVENT_EBB_SHIFT) & EVENT_EBB_MASK; - /* Clear the EBB bit in the event, so event checks work below */ - event &= ~(EVENT_EBB_MASK << EVENT_EBB_SHIFT); - if (pmc) { + u64 base_event; + if (pmc > 6) return -1; - mask |= CNST_PMC_MASK(pmc); - value |= CNST_PMC_VAL(pmc); + /* Ignore Linux defined bits when checking event below */ + base_event = event & ~(EVENT_EBB_MASK << EVENT_EBB_SHIFT); - if (pmc >= 5 && event != 0x500fa && event != 0x600f4) + if (pmc >= 5 && base_event != 0x500fa && base_event != 0x600f4) return -1; + + mask |= CNST_PMC_MASK(pmc); + value |= CNST_PMC_VAL(pmc); } if (pmc <= 4) {