From patchwork Wed Mar 12 17:17:24 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Josh Cartwright X-Patchwork-Id: 329580 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from mail-yh0-x240.google.com (mail-yh0-x240.google.com [IPv6:2607:f8b0:4002:c01::240]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id A0F542C0086 for ; Thu, 13 Mar 2014 04:20:27 +1100 (EST) Received: by mail-yh0-f64.google.com with SMTP id b6sf781745yha.19 for ; Wed, 12 Mar 2014 10:20:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlegroups.com; s=20120806; h=mime-version:from:to:cc:subject:date:message-id:in-reply-to :references:x-original-sender:x-original-authentication-results :reply-to:precedence:mailing-list:list-id:list-post:list-help :list-archive:sender:list-subscribe:list-unsubscribe:content-type; bh=p6hQtBN6gWjkmO3JzJkUhVT/iYaglCX+Krp80Dsidyc=; b=mXHgc4pw9w5Zae2TnCTeKnN+1OnFztCBcujAS8Jh9A/Lkk2OM6nvmceVuqY7P/jafs 1wpDz8fCAqvcrwWUgVY12b7VbMqzoAWLfb5wBd0+qX5CHg76q+bmuUMf6ufJRahOvdfA cgWk6RPIXAXud0IPnXfhYIMbHaS+OJIZoAgDltVsE7rawGOo5+Ezr5AcqMwPZvD664fg pdTmXKw65vkw7ivlwRN7TyAAzd4oPyzu+polRH8IoNtMW+Ay8Sds/7egXoEr9HYW5ez5 AyGE5VsK2zXtFuvyMwlBEP4QtXjjMjXObDWhkqm6bgkttj7qIohjK1QgGCTVGtqszS3/ LGpw== X-Received: by 10.50.43.131 with SMTP id w3mr613206igl.9.1394644825049; Wed, 12 Mar 2014 10:20:25 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: rtc-linux@googlegroups.com Received: by 10.50.13.99 with SMTP id g3ls262486igc.13.canary; Wed, 12 Mar 2014 10:20:24 -0700 (PDT) X-Received: by 10.66.66.109 with SMTP id e13mr2088300pat.1.1394644824394; Wed, 12 Mar 2014 10:20:24 -0700 (PDT) Received: from smtp.codeaurora.org (smtp.codeaurora.org. [198.145.11.231]) by gmr-mx.google.com with ESMTPS id pt3si1106409pac.0.2014.03.12.10.20.24 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 12 Mar 2014 10:20:24 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of joshc@codeaurora.org designates 198.145.11.231 as permitted sender) client-ip=198.145.11.231; Received: from smtp.codeaurora.org (localhost [127.0.0.1]) by smtp.codeaurora.org (Postfix) with ESMTP id 1971A13F257; Wed, 12 Mar 2014 17:20:24 +0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 486) id 078D513F32A; Wed, 12 Mar 2014 17:20:24 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-caf-smtp.dmz.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=ALL_TRUSTED,BAYES_00 autolearn=ham version=3.3.1 Received: from joshc.qualcomm.com (rrcs-67-52-129-61.west.biz.rr.com [67.52.129.61]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: joshc@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 9D3B313F271; Wed, 12 Mar 2014 17:20:23 +0000 (UTC) Received: by joshc.qualcomm.com (Postfix, from userid 1000) id 2D35D6354B; Wed, 12 Mar 2014 12:17:25 -0500 (CDT) From: Josh Cartwright To: Andrew Morton , Alessandro Zummo , linux-kernel@vger.kernel.org, Lee Jones Cc: linux-arm-msm@vger.kernel.org, rtc-linux@googlegroups.com, Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Rob Landley , devicetree@vger.kernel.org, linux-doc@vger.kernel.org, Samuel Ortiz Subject: [rtc-linux] [PATCH v3 6/6] mfd: devicetree: bindings: add pm8xxx RTC description Date: Wed, 12 Mar 2014 12:17:24 -0500 Message-Id: <1394644645-12818-1-git-send-email-joshc@codeaurora.org> X-Mailer: git-send-email 1.9.0 In-Reply-To: <20140310151807.7274d58d3c50b884585244b6@linux-foundation.org> References: <20140310151807.7274d58d3c50b884585244b6@linux-foundation.org> X-Virus-Scanned: ClamAV using ClamSMTP X-Original-Sender: joshc@codeaurora.org X-Original-Authentication-Results: gmr-mx.google.com; spf=pass (google.com: best guess record for domain of joshc@codeaurora.org designates 198.145.11.231 as permitted sender) smtp.mail=joshc@codeaurora.org Reply-To: rtc-linux@googlegroups.com Precedence: list Mailing-list: list rtc-linux@googlegroups.com; contact rtc-linux+owners@googlegroups.com List-ID: X-Google-Group-Id: 712029733259 List-Post: , List-Help: , List-Archive: Sender: rtc-linux@googlegroups.com List-Subscribe: , List-Unsubscribe: , The PM8xxx family of PMICs contain an RTC. This RTC is described as a subnode of the PM8xxx. Document these bindings, and replace the pwrkey node in the example with the RTC, which is now described in this document. While we're here, add a short description to the device tree bindings describing what the the PM8xxx devices are and how they are expected to be used. Signed-off-by: Josh Cartwright --- Andrew- Here's a new 6/6. Like mentioned earlier, this is based on the current MFD document that's in Lee's tree pending for 3.15. It may be best to get yours and Rob's Ack and have Lee take it through his tree. Thanks, Josh .../devicetree/bindings/mfd/qcom,pm8xxx.txt | 45 +++++++++++++++++++--- 1 file changed, 39 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/mfd/qcom,pm8xxx.txt b/Documentation/devicetree/bindings/mfd/qcom,pm8xxx.txt index e3fe625..03518dc 100644 --- a/Documentation/devicetree/bindings/mfd/qcom,pm8xxx.txt +++ b/Documentation/devicetree/bindings/mfd/qcom,pm8xxx.txt @@ -1,6 +1,9 @@ Qualcomm PM8xxx PMIC multi-function devices -PROPERTIES +The PM8xxx family of Power Management ICs are used to provide regulated +voltages and other various functionality to Qualcomm SoCs. + += PROPERTIES - compatible: Usage: required @@ -45,7 +48,37 @@ PROPERTIES Value type: Definition: identifies this node as an interrupt controller -EXAMPLE += SUBCOMPONENTS + +The PMIC contains multiple independent functions, each described in a subnode. +The below bindings specify the set of valid subnodes. + +== Real-Time Clock + +- compatible: + Usage: required + Value type: + Definition: must be one of: + "qcom,pm8058-rtc" + "qcom,pm8921-rtc" + +- reg: + Usage: required + Value type: + Definition: single entry specifying the base address of the RTC registers + +- interrupts: + Usage: required + Value type: + Definition: single entry specifying the RTC's alarm interrupt + +- allow-set-time: + Usage: optional + Value type: + Definition: indicates that the setting of RTC time is allowed by + the host CPU + += EXAMPLE pmicintc: pmic@0 { compatible = "qcom,pm8921"; @@ -55,9 +88,9 @@ EXAMPLE #address-cells = <1>; #size-cells = <0>; - pwrkey { - compatible = "qcom,pm8921-pwrkey"; - interrupt-parent = <&pmicintc>; - interrupts = <50 1>, <51 1>; + rtc@11d { + compatible = "qcom,pm8921-rtc"; + reg = <0x11d>; + interrupts = <0x27 0>; }; };