diff mbox

[U-Boot] powerpc/mpc85xx: SECURE BOOT- Add NAND secure boot target for BSC9132QDS

Message ID 1394641818-10039-1-git-send-email-aneesh.bansal@freescale.com
State Accepted
Delegated to: York Sun
Headers show

Commit Message

Aneesh Bansal March 12, 2014, 4:30 p.m. UTC 
In case of secure boot from NAND, the DDR is initialized by the
BootROM using the config words (CF_WORDS) in the CF_HEADER
and u-boot image is copied from NAND to DDR by the BootROM.
So, CONFIG_SYS_RAMBOOT has been defined for Secure Boot from NAND

Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com>
---
 boards.cfg                   | 2 ++
 include/configs/BSC9132QDS.h | 9 ++++++++-
 2 files changed, 10 insertions(+), 1 deletion(-)

Comments

York Sun April 23, 2014, 10:28 p.m. UTC | #1 
On 03/12/2014 09:30 AM, Aneesh Bansal wrote:
> In case of secure boot from NAND, the DDR is initialized by the
> BootROM using the config words (CF_WORDS) in the CF_HEADER
> and u-boot image is copied from NAND to DDR by the BootROM.
> So, CONFIG_SYS_RAMBOOT has been defined for Secure Boot from NAND
> 
> Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com>
> ---

Applied to u-boot-mpc85xx/master, thanks.

York
diff mbox

Patch

diff --git a/boards.cfg b/boards.cfg
index 3e73d7e..deddbd8 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -804,6 +804,8 @@  Active  powerpc     mpc85xx        -           freescale       bsc9132qds
 Active  powerpc     mpc85xx        -           freescale       bsc9132qds          BSC9132QDS_SDCARD_DDRCLK133_SECURE   BSC9132QDS:BSC9132QDS,SDCARD,SYS_CLK_100_DDR_133,SECURE_BOOT                                                                      Aneesh Bansal <aneesh.bansal@freescale.com>
 Active  powerpc     mpc85xx        -           freescale       bsc9132qds          BSC9132QDS_SPIFLASH_DDRCLK100_SECURE BSC9132QDS:BSC9132QDS,SPIFLASH,SYS_CLK_100_DDR_100,SECURE_BOOT                                                                    Aneesh Bansal <aneesh.bansal@freescale.com>
 Active  powerpc     mpc85xx        -           freescale       bsc9132qds          BSC9132QDS_SPIFLASH_DDRCLK133_SECURE BSC9132QDS:BSC9132QDS,SPIFLASH,SYS_CLK_100_DDR_133,SECURE_BOOT                                                                    Aneesh Bansal <aneesh.bansal@freescale.com>
+Active  powerpc     mpc85xx        -           freescale       bsc9132qds          BSC9132QDS_NAND_DDRCLK100_SECURE     BSC9132QDS:BSC9132QDS,NAND_SECBOOT,SYS_CLK_100_DDR_100,SECURE_BOOT                                                                Aneesh Bansal <aneesh.bansal@freescale.com>
+Active  powerpc     mpc85xx        -           freescale       bsc9132qds          BSC9132QDS_NAND_DDRCLK133_SECURE     BSC9132QDS:BSC9132QDS,NAND_SECBOOT,SYS_CLK_100_DDR_133,SECURE_BOOT                                                                Aneesh Bansal <aneesh.bansal@freescale.com>
 Active  powerpc     mpc85xx        -           freescale       c29xpcie            C29XPCIE                             C29XPCIE:C29XPCIE,36BIT                                                                                                           Po Liu <po.liu@freescale.com>
 Active  powerpc     mpc85xx        -           freescale       c29xpcie            C29XPCIE_NAND                        C29XPCIE:C29XPCIE,36BIT,NAND                                                                                                      Po Liu <po.liu@freescale.com>
 Active  powerpc     mpc85xx        -           freescale       c29xpcie            C29XPCIE_SPIFLASH                    C29XPCIE:C29XPCIE,36BIT,SPIFLASH                                                                                                  Po Liu <po.liu@freescale.com>
diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h
index 772e123..1b119f1 100644
--- a/include/configs/BSC9132QDS.h
+++ b/include/configs/BSC9132QDS.h
@@ -32,6 +32,13 @@ 
 #define CONFIG_SYS_TEXT_BASE		0x11000000
 #define CONFIG_RESET_VECTOR_ADDRESS	0x110bfffc
 #endif
+#ifdef CONFIG_NAND_SECBOOT
+#define CONFIG_RAMBOOT_NAND
+#define CONFIG_SYS_RAMBOOT
+#define CONFIG_SYS_EXTRA_ENV_RELOC
+#define CONFIG_SYS_TEXT_BASE		0x11000000
+#define CONFIG_RESET_VECTOR_ADDRESS	0x110bfffc
+#endif
 
 #ifdef CONFIG_NAND
 #define CONFIG_SPL
@@ -551,7 +558,7 @@  combinations. this should be removed later
 #define CONFIG_ENV_OFFSET	0x100000	/* 1MB */
 #define CONFIG_ENV_SECT_SIZE	0x10000
 #define CONFIG_ENV_SIZE		0x2000
-#elif defined(CONFIG_NAND)
+#elif defined(CONFIG_NAND) || defined(CONFIG_NAND_SECBOOT)
 #define CONFIG_ENV_IS_IN_NAND
 #define CONFIG_ENV_SIZE		CONFIG_SYS_NAND_BLOCK_SIZE
 #define CONFIG_ENV_OFFSET	((768 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE)