diff mbox

[qom-cpu,v2,27/40] translate-all: Change tb_flush_jmp_cache() argument to CPUState

Message ID 1394410549-13751-28-git-send-email-afaerber@suse.de
State New
Headers show

Commit Message

Andreas Färber March 10, 2014, 12:15 a.m. UTC 
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 cputlb.c              | 2 +-
 include/exec/cputlb.h | 2 +-
 translate-all.c       | 3 +--
 3 files changed, 3 insertions(+), 4 deletions(-)
diff mbox

Patch

diff --git a/cputlb.c b/cputlb.c
index 0eb1801..6b2cdb2 100644
--- a/cputlb.c
+++ b/cputlb.c
@@ -106,7 +106,7 @@  void tlb_flush_page(CPUArchState *env, target_ulong addr)
         tlb_flush_entry(&env->tlb_table[mmu_idx][i], addr);
     }
 
-    tb_flush_jmp_cache(env, addr);
+    tb_flush_jmp_cache(cpu, addr);
 }
 
 /* update the TLBs so that writes to code in the virtual page 'addr'
diff --git a/include/exec/cputlb.h b/include/exec/cputlb.h
index e21cb60..e1eb4d9 100644
--- a/include/exec/cputlb.h
+++ b/include/exec/cputlb.h
@@ -31,7 +31,7 @@  void tlb_set_dirty(CPUArchState *env, target_ulong vaddr);
 extern int tlb_flush_count;
 
 /* exec.c */
-void tb_flush_jmp_cache(CPUArchState *env, target_ulong addr);
+void tb_flush_jmp_cache(CPUState *cpu, target_ulong addr);
 
 MemoryRegionSection *
 address_space_translate_for_iotlb(AddressSpace *as, hwaddr addr, hwaddr *xlat,
diff --git a/translate-all.c b/translate-all.c
index a7130a5..df85f9f 100644
--- a/translate-all.c
+++ b/translate-all.c
@@ -1479,9 +1479,8 @@  void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr)
     cpu_resume_from_signal(env, NULL);
 }
 
-void tb_flush_jmp_cache(CPUArchState *env, target_ulong addr)
+void tb_flush_jmp_cache(CPUState *cpu, target_ulong addr)
 {
-    CPUState *cpu = ENV_GET_CPU(env);
     unsigned int i;
 
     /* Discard jump cache entries for any tb which might potentially