diff mbox

[U-Boot,6/7] Makefile: Add support of RAMBOOT_SPLPBL

Message ID 1394108020-17785-1-git-send-email-prabhakar@freescale.com
State Superseded
Delegated to: York Sun
Headers show

Commit Message

Prabhakar Kushwaha March 6, 2014, 12:13 p.m. UTC 
Objective of this target to have concatenate binary having
	- SPL binary in PBL command format
	- U-boot binary

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
---
 Changes for v2: Updated target


 Makefile |   12 ++++++++++++
 README   |    4 ++++
 2 files changed, 16 insertions(+)
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Patch

diff --git a/Makefile b/Makefile
index ecac292..6aac95a 100644
--- a/Makefile
+++ b/Makefile
@@ -706,7 +706,11 @@  ALL-y += u-boot.srec u-boot.bin System.map
 
 ALL-$(CONFIG_NAND_U_BOOT) += u-boot-nand.bin
 ALL-$(CONFIG_ONENAND_U_BOOT) += u-boot-onenand.bin
+ifeq ($(CONFIG_RAMBOOT_SPLPBL),y)
+ALL-$(CONFIG_RAMBOOT_PBL) += u-boot-with-spl-pbl.bin
+else
 ALL-$(CONFIG_RAMBOOT_PBL) += u-boot.pbl
+endif
 ALL-$(CONFIG_SPL) += spl/u-boot-spl.bin
 ALL-$(CONFIG_SPL_FRAMEWORK) += u-boot.img
 ALL-$(CONFIG_TPL) += tpl/u-boot-tpl.bin
@@ -835,6 +839,14 @@  OBJCOPYFLAGS_u-boot-with-tpl.bin = -I binary -O binary \
 tpl/u-boot-with-tpl.bin: tpl/u-boot-tpl.bin u-boot.bin FORCE
 	$(call if_changed,pad_cat)
 
+u-boot-with-spl-pbl.bin: spl/u-boot-spl.bin u-boot.bin
+		tools/mkimage -n $(CONFIG_SYS_FSL_PBL_RCW) \
+		-R $(CONFIG_SYS_FSL_PBL_PBI) -T pblimage \
+		-d $< $@
+		$(OBJCOPY) -I binary -O binary \
+			--pad-to=$(CONFIG_SPL_PAD_TO) --gap-fill=0xff $@
+		cat u-boot.bin >> $@
+
 SPL: spl/u-boot-spl.bin FORCE
 	$(Q)$(MAKE) $(build)=arch/arm/imx-common $@
 
diff --git a/README b/README
index 413a844..91ef97c 100644
--- a/README
+++ b/README
@@ -486,6 +486,10 @@  The following options need to be configured:
 		PBI commands can be used to configure SoC before it starts the execution.
 		Please refer doc/README.pblimage for more details
 
+		CONFIG_RAMBOOT_SPLPBL
+		It adds a target to create boot binary having SPL binary in PBI format
+		concatenated with u-boot binary.
+
 		CONFIG_SYS_FSL_DDR_BE
 		Defines the DDR controller register space as Big Endian