@@ -59,6 +59,13 @@
reg = <0xe0000000 0x00000200>;
bus-frequency = <0>; /* Filled in by U-Boot */
+ pmc: power@b00 {
+ compatible = "fsl,mpc8360-pmc", "fsl,mpc8349-pmc";
+ reg = <0xb00 0x100 0xa00 0x100>;
+ interrupts = <80 0x8>;
+ interrupt-parent = <&ipic>;
+ };
+
i2c@3000 {
#address-cells = <1>;
#size-cells = <0>;
@@ -79,6 +79,13 @@
reg = <0x200 0x100>;
};
+ pmc: power@b00 {
+ compatible = "fsl,mpc8323-pmc", "fsl,mpc8349-pmc";
+ reg = <0xb00 0x100 0xa00 0x100>;
+ interrupts = <80 0x8>;
+ interrupt-parent = <&ipic>;
+ };
+
i2c@3000 {
#address-cells = <1>;
#size-cells = <0>;
@@ -163,6 +170,7 @@
fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0x4c>;
fsl,descriptor-types-mask = <0x0122003f>;
+ sleep = <&pmc 0x03000000>;
};
ipic: pic@700 {
@@ -428,5 +436,6 @@
0xe0008300 0x8>; /* config space access registers */
compatible = "fsl,mpc8349-pci";
device_type = "pci";
+ sleep = <&pmc 0x00010000>;
};
};
@@ -62,6 +62,13 @@
reg = <0x200 0x100>;
};
+ pmc: power@b00 {
+ compatible = "fsl,mpc8323-pmc", "fsl,mpc8349-pmc";
+ reg = <0xb00 0x100 0xa00 0x100>;
+ interrupts = <80 0x8>;
+ interrupt-parent = <&ipic>;
+ };
+
i2c@3000 {
#address-cells = <1>;
#size-cells = <0>;
@@ -141,6 +148,7 @@
fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0x4c>;
fsl,descriptor-types-mask = <0x0122003f>;
+ sleep = <&pmc 0x03000000>;
};
ipic:pic@700 {
@@ -360,5 +368,6 @@
0xe0008300 0x8>; /* config space access registers */
compatible = "fsl,mpc8349-pci";
device_type = "pci";
+ sleep = <&pmc 0x00010000>;
};
};
@@ -99,6 +99,13 @@
reg = <0x200 0x100>;
};
+ pmc: power@b00 {
+ compatible = "fsl,mpc8360-pmc", "fsl,mpc8349-pmc";
+ reg = <0xb00 0x100 0xa00 0x100>;
+ interrupts = <80 0x8>;
+ interrupt-parent = <&ipic>;
+ };
+
i2c@3000 {
#address-cells = <1>;
#size-cells = <0>;
@@ -194,6 +201,7 @@
fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0x7e>;
fsl,descriptor-types-mask = <0x01010ebf>;
+ sleep = <&pmc 0x03000000>;
};
ipic: pic@700 {
@@ -470,5 +478,6 @@
0xe0008300 0x8>; /* config space access registers */
compatible = "fsl,mpc8349-pci";
device_type = "pci";
+ sleep = <&pmc 0x00010000>;
};
};
@@ -71,6 +71,13 @@
reg = <0x200 0x100>;
};
+ pmc: power@b00 {
+ compatible = "fsl,mpc8360-pmc", "fsl,mpc8349-pmc";
+ reg = <0xb00 0x100 0xa00 0x100>;
+ interrupts = <80 0x8>;
+ interrupt-parent = <&ipic>;
+ };
+
i2c@3000 {
#address-cells = <1>;
#size-cells = <0>;
@@ -161,6 +168,7 @@
fsl,channel-fifo-len = <24>;
fsl,exec-units-mask = <0x7e>;
fsl,descriptor-types-mask = <0x01010ebf>;
+ sleep = <&pmc 0x03000000>;
};
ipic: interrupt-controller@700 {
@@ -455,6 +463,7 @@
0xa800 0 0 2 &ipic 20 8
0xa800 0 0 3 &ipic 21 8
0xa800 0 0 4 &ipic 18 8>;
+ sleep = <&pmc 0x00010000>;
/* filled by u-boot */
bus-range = <0 0>;
clock-frequency = <0>;
Simply add power management controller nodes and sleep properties. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> --- arch/powerpc/boot/dts/kmeter1.dts | 7 +++++++ arch/powerpc/boot/dts/mpc832x_mds.dts | 9 +++++++++ arch/powerpc/boot/dts/mpc832x_rdb.dts | 9 +++++++++ arch/powerpc/boot/dts/mpc836x_mds.dts | 9 +++++++++ arch/powerpc/boot/dts/mpc836x_rdk.dts | 9 +++++++++ 5 files changed, 43 insertions(+), 0 deletions(-)