diff mbox

[v2] target-ppc: add extended opcodes for dcbt/dcbtst

Message ID 1392902435-13153-1-git-send-email-clg@fr.ibm.com
State New
Headers show

Commit Message

Cédric Le Goater Feb. 20, 2014, 1:20 p.m. UTC
The latest glibc provides a memrchr routine using an extended opcode 
of the 'dcbt' instruction :

00000000000a7cc0 <memrchr>:
   a7cc0:       11 00 4c 3c     addis   r2,r12,17
   a7cc4:       b8 f8 42 38     addi    r2,r2,-1864
   a7cc8:       14 2a e3 7c     add     r7,r3,r5
   a7ccc:       d0 00 07 7c     neg     r0,r7
   a7cd0:       ff ff e7 38     addi    r7,r7,-1
   a7cd4:       78 1b 6a 7c     mr      r10,r3
   a7cd8:       24 06 e6 78     rldicr  r6,r7,0,56
   a7cdc:       60 00 20 39     li      r9,96
   a7ce0:       2c 32 09 7e     dcbtt   r9,r6
   ....

which breaks grep, and other commands, in TCG mode :

   invalid bits: 02000000 for opcode: 1f - 16 - 08 (7e09322c) 00003fff799feca0

This patch adds the extended opcodes for dcbt/dcbtst as no-ops just 
like the 'dcbt' instruction. 

Signed-off-by: Cédric Le Goater <clg@fr.ibm.com>
---

Changes in v2: 

 - added extended opcodes for dcbtst

 target-ppc/translate.c |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Alexander Graf Feb. 20, 2014, 1:23 p.m. UTC | #1
On 20.02.2014, at 14:20, Cédric Le Goater <clg@fr.ibm.com> wrote:

> The latest glibc provides a memrchr routine using an extended opcode 
> of the 'dcbt' instruction :
> 
> 00000000000a7cc0 <memrchr>:
>   a7cc0:       11 00 4c 3c     addis   r2,r12,17
>   a7cc4:       b8 f8 42 38     addi    r2,r2,-1864
>   a7cc8:       14 2a e3 7c     add     r7,r3,r5
>   a7ccc:       d0 00 07 7c     neg     r0,r7
>   a7cd0:       ff ff e7 38     addi    r7,r7,-1
>   a7cd4:       78 1b 6a 7c     mr      r10,r3
>   a7cd8:       24 06 e6 78     rldicr  r6,r7,0,56
>   a7cdc:       60 00 20 39     li      r9,96
>   a7ce0:       2c 32 09 7e     dcbtt   r9,r6
>   ....
> 
> which breaks grep, and other commands, in TCG mode :
> 
>   invalid bits: 02000000 for opcode: 1f - 16 - 08 (7e09322c) 00003fff799feca0
> 
> This patch adds the extended opcodes for dcbt/dcbtst as no-ops just 
> like the 'dcbt' instruction. 
> 
> Signed-off-by: Cédric Le Goater <clg@fr.ibm.com>

Thanks, applied to ppc-next.


Alex
diff mbox

Patch

Index: qemu-agraf.git/target-ppc/translate.c
===================================================================
--- qemu-agraf.git.orig/target-ppc/translate.c
+++ qemu-agraf.git/target-ppc/translate.c
@@ -9596,8 +9596,8 @@  GEN_HANDLER(mtspr, 0x1F, 0x13, 0x0E, 0x0
 GEN_HANDLER(dcbf, 0x1F, 0x16, 0x02, 0x03C00001, PPC_CACHE),
 GEN_HANDLER(dcbi, 0x1F, 0x16, 0x0E, 0x03E00001, PPC_CACHE),
 GEN_HANDLER(dcbst, 0x1F, 0x16, 0x01, 0x03E00001, PPC_CACHE),
-GEN_HANDLER(dcbt, 0x1F, 0x16, 0x08, 0x02000001, PPC_CACHE),
-GEN_HANDLER(dcbtst, 0x1F, 0x16, 0x07, 0x02000001, PPC_CACHE),
+GEN_HANDLER(dcbt, 0x1F, 0x16, 0x08, 0x00000001, PPC_CACHE),
+GEN_HANDLER(dcbtst, 0x1F, 0x16, 0x07, 0x00000001, PPC_CACHE),
 GEN_HANDLER(dcbz, 0x1F, 0x16, 0x1F, 0x03C00001, PPC_CACHE_DCBZ),
 GEN_HANDLER(dst, 0x1F, 0x16, 0x0A, 0x01800001, PPC_ALTIVEC),
 GEN_HANDLER(dstst, 0x1F, 0x16, 0x0B, 0x02000001, PPC_ALTIVEC),