From patchwork Mon Aug 24 14:16:51 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Juan Quintela X-Patchwork-Id: 31946 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by bilbo.ozlabs.org (Postfix) with ESMTPS id EB4BAB7257 for ; Tue, 25 Aug 2009 00:40:32 +1000 (EST) Received: from localhost ([127.0.0.1]:46498 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Mfaid-0008WT-MA for incoming@patchwork.ozlabs.org; Mon, 24 Aug 2009 10:40:23 -0400 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1MfaOY-0007aO-0H for qemu-devel@nongnu.org; Mon, 24 Aug 2009 10:19:38 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1MfaOQ-0007OO-E6 for qemu-devel@nongnu.org; Mon, 24 Aug 2009 10:19:35 -0400 Received: from [199.232.76.173] (port=41042 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1MfaOQ-0007OA-82 for qemu-devel@nongnu.org; Mon, 24 Aug 2009 10:19:30 -0400 Received: from mx20.gnu.org ([199.232.41.8]:6996) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1MfaOP-0000Gk-UG for qemu-devel@nongnu.org; Mon, 24 Aug 2009 10:19:30 -0400 Received: from mx1.redhat.com ([209.132.183.28]) by mx20.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1MfaOP-0001JN-66 for qemu-devel@nongnu.org; Mon, 24 Aug 2009 10:19:29 -0400 Received: from int-mx04.intmail.prod.int.phx2.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.17]) by mx1.redhat.com (8.13.8/8.13.8) with ESMTP id n7OEJSEF026952 for ; Mon, 24 Aug 2009 10:19:28 -0400 Received: from localhost.localdomain (vpn1-4-157.ams2.redhat.com [10.36.4.157]) by int-mx04.intmail.prod.int.phx2.redhat.com (8.13.8/8.13.8) with ESMTP id n7OEJJYB029317; Mon, 24 Aug 2009 10:19:27 -0400 From: Juan Quintela To: qemu-devel@nongnu.org Date: Mon, 24 Aug 2009 16:16:51 +0200 Message-Id: <3e67f1f8efc3506a38ebaf95461cb8323de66626.1251122302.git.quintela@redhat.com> In-Reply-To: References: In-Reply-To: References: X-Scanned-By: MIMEDefang 2.67 on 10.5.11.17 X-Detected-Operating-System: by mx20.gnu.org: Genre and OS details not recognized. X-detected-operating-system: by monty-python.gnu.org: GNU/Linux 2.6, seldom 2.4 (older, 4) Subject: [Qemu-devel] [PATCH 06/13] We want the argument pass to set_irq to be opaque X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org piix_pci want to pass more things that the pic Signed-off-by: Juan Quintela --- hw/apb_pci.c | 4 +++- hw/grackle_pci.c | 4 +++- hw/gt64xxx.c | 3 ++- hw/pci.c | 6 +++--- hw/pci.h | 6 +++--- hw/piix_pci.c | 5 +++-- hw/ppc4xx_pci.c | 4 +++- hw/ppce500_pci.c | 4 +++- hw/prep_pci.c | 4 +++- hw/r2d.c | 4 +++- hw/sh_pci.c | 4 ++-- hw/unin_pci.c | 4 +++- hw/versatile_pci.c | 4 +++- 13 files changed, 37 insertions(+), 19 deletions(-) diff --git a/hw/apb_pci.c b/hw/apb_pci.c index 8b42fa8..869e230 100644 --- a/hw/apb_pci.c +++ b/hw/apb_pci.c @@ -218,8 +218,10 @@ static int pci_pbm_map_irq(PCIDevice *pci_dev, int irq_num) return bus_offset + irq_num; } -static void pci_apb_set_irq(qemu_irq *pic, int irq_num, int level) +static void pci_apb_set_irq(void *opaque, int irq_num, int level) { + qemu_irq *pic = opaque; + /* PCI IRQ map onto the first 32 INO. */ qemu_set_irq(pic[irq_num], level); } diff --git a/hw/grackle_pci.c b/hw/grackle_pci.c index b893ebe..49cca56 100644 --- a/hw/grackle_pci.c +++ b/hw/grackle_pci.c @@ -102,8 +102,10 @@ static int pci_grackle_map_irq(PCIDevice *pci_dev, int irq_num) return (irq_num + (pci_dev->devfn >> 3)) & 3; } -static void pci_grackle_set_irq(qemu_irq *pic, int irq_num, int level) +static void pci_grackle_set_irq(void *opaque, int irq_num, int level) { + qemu_irq *pic = opaque; + GRACKLE_DPRINTF("set_irq num %d level %d\n", irq_num, level); qemu_set_irq(pic[irq_num + 0x15], level); } diff --git a/hw/gt64xxx.c b/hw/gt64xxx.c index 3b44fc9..6f982e9 100644 --- a/hw/gt64xxx.c +++ b/hw/gt64xxx.c @@ -893,9 +893,10 @@ static int pci_gt64120_map_irq(PCIDevice *pci_dev, int irq_num) static int pci_irq_levels[4]; -static void pci_gt64120_set_irq(qemu_irq *pic, int irq_num, int level) +static void pci_gt64120_set_irq(void *opaque, int irq_num, int level) { int i, pic_irq, pic_level; + qemu_irq *pic = opaque; pci_irq_levels[irq_num] = level; diff --git a/hw/pci.c b/hw/pci.c index e209ceb..c37a732 100644 --- a/hw/pci.c +++ b/hw/pci.c @@ -41,7 +41,7 @@ struct PCIBus { pci_set_irq_fn set_irq; pci_map_irq_fn map_irq; uint32_t config_reg; /* XXX: suppress */ - qemu_irq *irq_opaque; + void *irq_opaque; PCIDevice *devices[256]; PCIDevice *parent_dev; PCIBus *next; @@ -119,7 +119,7 @@ static void pci_bus_reset(void *opaque) PCIBus *pci_register_bus(DeviceState *parent, const char *name, pci_set_irq_fn set_irq, pci_map_irq_fn map_irq, - qemu_irq *pic, int devfn_min, int nirq) + void *irq_opaque, int devfn_min, int nirq) { PCIBus *bus; static int nbus = 0; @@ -127,7 +127,7 @@ PCIBus *pci_register_bus(DeviceState *parent, const char *name, bus = FROM_QBUS(PCIBus, qbus_create(&pci_bus_info, parent, name)); bus->set_irq = set_irq; bus->map_irq = map_irq; - bus->irq_opaque = pic; + bus->irq_opaque = irq_opaque; bus->devfn_min = devfn_min; bus->nirq = nirq; bus->irq_count = qemu_mallocz(nirq * sizeof(bus->irq_count[0])); diff --git a/hw/pci.h b/hw/pci.h index a2ec16a..10c9733 100644 --- a/hw/pci.h +++ b/hw/pci.h @@ -237,11 +237,11 @@ void pci_default_write_config(PCIDevice *d, void pci_device_save(PCIDevice *s, QEMUFile *f); int pci_device_load(PCIDevice *s, QEMUFile *f); -typedef void (*pci_set_irq_fn)(qemu_irq *pic, int irq_num, int level); +typedef void (*pci_set_irq_fn)(void *opaque, int irq_num, int level); typedef int (*pci_map_irq_fn)(PCIDevice *pci_dev, int irq_num); PCIBus *pci_register_bus(DeviceState *parent, const char *name, pci_set_irq_fn set_irq, pci_map_irq_fn map_irq, - qemu_irq *pic, int devfn_min, int nirq); + void *irq_opaque, int devfn_min, int nirq); PCIDevice *pci_nic_init(NICInfo *nd, const char *default_model, const char *default_devaddr); @@ -351,6 +351,6 @@ PCIBus *pci_apb_init(target_phys_addr_t special_base, /* sh_pci.c */ PCIBus *sh_pci_register_bus(pci_set_irq_fn set_irq, pci_map_irq_fn map_irq, - qemu_irq *pic, int devfn_min, int nirq); + void *pic, int devfn_min, int nirq); #endif diff --git a/hw/piix_pci.c b/hw/piix_pci.c index d8aeeec..4739604 100644 --- a/hw/piix_pci.c +++ b/hw/piix_pci.c @@ -51,7 +51,7 @@ static uint32_t i440fx_addr_readl(void* opaque, uint32_t addr) return s->config_reg; } -static void piix3_set_irq(qemu_irq *pic, int irq_num, int level); +static void piix3_set_irq(void *opaque, int irq_num, int level); /* return the global irq number corresponding to a given device irq pin. We could also use the bus number to have a more precise @@ -231,9 +231,10 @@ PCIBus *i440fx_init(PCII440FXState **pi440fx_state, qemu_irq *pic) static PCIDevice *piix3_dev; -static void piix3_set_irq(qemu_irq *pic, int irq_num, int level) +static void piix3_set_irq(void *opaque, int irq_num, int level) { int i, pic_irq, pic_level; + qemu_irq *pic = opaque; pci_irq_levels[irq_num] = level; diff --git a/hw/ppc4xx_pci.c b/hw/ppc4xx_pci.c index 077ae70..3295eba 100644 --- a/hw/ppc4xx_pci.c +++ b/hw/ppc4xx_pci.c @@ -304,8 +304,10 @@ static int ppc4xx_pci_map_irq(PCIDevice *pci_dev, int irq_num) return slot - 1; } -static void ppc4xx_pci_set_irq(qemu_irq *pci_irqs, int irq_num, int level) +static void ppc4xx_pci_set_irq(void *opaque, int irq_num, int level) { + qemu_irq *pci_irqs = opaque; + DPRINTF("%s: PCI irq %d\n", __func__, irq_num); qemu_set_irq(pci_irqs[irq_num], level); } diff --git a/hw/ppce500_pci.c b/hw/ppce500_pci.c index 5b4673a..7cb1fd9 100644 --- a/hw/ppce500_pci.c +++ b/hw/ppce500_pci.c @@ -253,8 +253,10 @@ static int mpc85xx_pci_map_irq(PCIDevice *pci_dev, int irq_num) return ret; } -static void mpc85xx_pci_set_irq(qemu_irq *pic, int irq_num, int level) +static void mpc85xx_pci_set_irq(void *opaque, int irq_num, int level) { + qemu_irq *pic = opaque; + pci_debug("%s: PCI irq %d, level:%d\n", __func__, irq_num, level); qemu_set_irq(pic[irq_num], level); diff --git a/hw/prep_pci.c b/hw/prep_pci.c index 80058b1..816c0cc 100644 --- a/hw/prep_pci.c +++ b/hw/prep_pci.c @@ -124,8 +124,10 @@ static int prep_map_irq(PCIDevice *pci_dev, int irq_num) return (irq_num + (pci_dev->devfn >> 3)) & 1; } -static void prep_set_irq(qemu_irq *pic, int irq_num, int level) +static void prep_set_irq(void *opaque, int irq_num, int level) { + qemu_irq *pic = opaque; + qemu_set_irq(pic[(irq_num & 1) ? 11 : 9] , level); } diff --git a/hw/r2d.c b/hw/r2d.c index 697bcb6..7e509da 100644 --- a/hw/r2d.c +++ b/hw/r2d.c @@ -182,8 +182,10 @@ static qemu_irq *r2d_fpga_init(target_phys_addr_t base, qemu_irq irl) return qemu_allocate_irqs(r2d_fpga_irq_set, s, NR_IRQS); } -static void r2d_pci_set_irq(qemu_irq *p, int n, int l) +static void r2d_pci_set_irq(void *opaque, int n, int l) { + qemu_irq *p = opaque; + qemu_set_irq(p[n], l); } diff --git a/hw/sh_pci.c b/hw/sh_pci.c index 1b148ab..5f9b062 100644 --- a/hw/sh_pci.c +++ b/hw/sh_pci.c @@ -168,14 +168,14 @@ static MemOp sh_pci_iop = { }; PCIBus *sh_pci_register_bus(pci_set_irq_fn set_irq, pci_map_irq_fn map_irq, - qemu_irq *pic, int devfn_min, int nirq) + void *opaque, int devfn_min, int nirq) { SHPCIC *p; int mem, reg, iop; p = qemu_mallocz(sizeof(SHPCIC)); p->bus = pci_register_bus(NULL, "pci", - set_irq, map_irq, pic, devfn_min, nirq); + set_irq, map_irq, opaque, devfn_min, nirq); p->dev = pci_register_device(p->bus, "SH PCIC", sizeof(PCIDevice), -1, NULL, NULL); diff --git a/hw/unin_pci.c b/hw/unin_pci.c index 73944af..d2415da 100644 --- a/hw/unin_pci.c +++ b/hw/unin_pci.c @@ -141,8 +141,10 @@ static int pci_unin_map_irq(PCIDevice *pci_dev, int irq_num) return (irq_num + (pci_dev->devfn >> 3)) & 3; } -static void pci_unin_set_irq(qemu_irq *pic, int irq_num, int level) +static void pci_unin_set_irq(void *opaque, int irq_num, int level) { + qemu_irq *pic = opaque; + qemu_set_irq(pic[irq_num + 8], level); } diff --git a/hw/versatile_pci.c b/hw/versatile_pci.c index 5eb2625..fa1288c 100644 --- a/hw/versatile_pci.c +++ b/hw/versatile_pci.c @@ -90,8 +90,10 @@ static int pci_vpb_map_irq(PCIDevice *d, int irq_num) return irq_num; } -static void pci_vpb_set_irq(qemu_irq *pic, int irq_num, int level) +static void pci_vpb_set_irq(void *opaque, int irq_num, int level) { + qemu_irq *pic = opaque; + qemu_set_irq(pic[irq_num], level); }