From patchwork Tue Feb 11 10:42:52 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 319211 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 9B82B2C009B for ; Tue, 11 Feb 2014 21:43:07 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751082AbaBKKnG (ORCPT ); Tue, 11 Feb 2014 05:43:06 -0500 Received: from moutng.kundenserver.de ([212.227.126.171]:59348 "EHLO moutng.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750903AbaBKKnF (ORCPT ); Tue, 11 Feb 2014 05:43:05 -0500 Received: from wuerfel.localnet (HSI-KBW-5-56-226-176.hsi17.kabel-badenwuerttemberg.de [5.56.226.176]) by mrelayeu.kundenserver.de (node=mreue007) with ESMTP (Nemesis) id 0Ld8Mf-1VUjIZ0Z8b-00iVC0; Tue, 11 Feb 2014 11:42:58 +0100 From: Arnd Bergmann To: linux-arm-kernel@lists.infradead.org Cc: Jason Gunthorpe , "linux-pci@vger.kernel.org" , Liviu Dudau , Will Deacon , "mohit.kumar@st.com" , "bhelgaas@google.com" Subject: Re: [PATCH 2/3] PCI: ARM: add support for virtual PCI host controller Date: Tue, 11 Feb 2014 11:42:52 +0100 Message-ID: <2006726.HhIT01YuXY@wuerfel> User-Agent: KMail/4.11.3 (Linux/3.11.0-15-generic; KDE/4.11.3; x86_64; ; ) In-Reply-To: <20140210173450.GA5554@obsidianresearch.com> References: <1391532784-1953-1-git-send-email-will.deacon@arm.com> <201402092130.25615.arnd@arndb.de> <20140210173450.GA5554@obsidianresearch.com> MIME-Version: 1.0 X-Provags-ID: V02:K0:ustwMonhcMPJTyIjSNmD8UWBvCpge5iScSVJ4JJ24i0 n2DgC7l+yC+0Dkz/Tihj8bp7Ekr5OiYj1XSkAgynjI7oUKfVtd 5F2FztZEGOov9GwHHjeWxNcaMnn3cqKNwjrTtAvUWnGtyYnnB2 0LKA7iiEYDklkKIE6MQasHpcNxPkBpMSyMIFF9sZI5tkgzCW47 +r230BwauHyqRsv61c5d2tdfG4HMDKq0HSettIDz773SLaLFA3 bnkdTqNfHyQM8Gl7Z0hcz3Z35GQtU92u0FjdE+pKyzRf86bcxG 34Ee+0hO8l4sSLBNpYLN3ORvcVvFGuWGr9f8etqfS7kJKB9OVU P/SFPPwImumu5gBcqX+Y= Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org On Monday 10 February 2014 10:34:50 Jason Gunthorpe wrote: > I noticed this on mvebu as well.. > > 3.13 w/ mvebu driver: > > e0001000-e0001fff : /mbus/pex@e0000000/pcie@1,0/fpga@0/fpga_sysmon@1000 > e0006000-e0006fff : /mbus/pex@e0000000/pcie@1,0/fpga@0/qdr2p@6000 > > 3.10 w/ old kirkwood driver: > > e0000000-e7ffffff : PCIe 0 MEM > e0000000-e001ffff : 0000:00:01.0 > e0001000-e0001fff : /mbus/pex@e0000000/pcie@1,0/fpga@0/fpga_sysmon@1000 > e0006000-e0006fff : /mbus/pex@e0000000/pcie@1,0/fpga@0/qdr2p@6000 > > The latter is obviously correct and matches x86. I'm not sure where > the new style host drivers are going wrong, even the resource that > should be added by the PCI core itself for the BAR is missing.. I looked briefly at the code and found that mach-kirkwood/pcie.c does both request_resource() and pci_add_resource_offset(), while drivers/pci/host/pci-mvebu.c only does the latter. Does the patch below restore the previous behavior? Since the mvebu_pcie_setup() function seems very generic at this, we should probably try to factor out that code into a common helper, at least for arm64, but ideally shared with arm32 as well. Arnd --- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/pci/host/pci-mvebu.c b/drivers/pci/host/pci-mvebu.c index 13478ec..b55e9a6 100644 --- a/drivers/pci/host/pci-mvebu.c +++ b/drivers/pci/host/pci-mvebu.c @@ -680,9 +680,17 @@ static int mvebu_pcie_setup(int nr, struct pci_sys_data *sys) struct mvebu_pcie *pcie = sys_to_pcie(sys); int i; - if (resource_size(&pcie->realio) != 0) + if (request_resource(&iomem_resource, &pcie->mem)) + return 0; + + if (resource_size(&pcie->realio) != 0) { + if (request_resource(&ioport_resource, &pcie->realio)) { + release_resource(&pcie->mem); + return 0; + } pci_add_resource_offset(&sys->resources, &pcie->realio, sys->io_offset); + } pci_add_resource_offset(&sys->resources, &pcie->mem, sys->mem_offset); pci_add_resource(&sys->resources, &pcie->busn);