diff mbox

[U-Boot,2/4] ARM: tegra: fix pmc_pwrgate_timer_mult register definition

Message ID 1391461407-21529-2-git-send-email-swarren@wwwdotorg.org
State Accepted
Delegated to: Tom Warren
Headers show

Commit Message

Stephen Warren Feb. 3, 2014, 9:03 p.m. UTC 
From: Stephen Warren <swarren@nvidia.com>

Register pmc_pwrgate_timer_mult has a different layout on Tegra114 and
Tegra124. Reflect this in pmc.h.

Also, simply write the whole of the register in start_cpu() rather than
doing a read-modify-write; the register is simple enough that the code
can easily construct the entire desired value.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
 arch/arm/cpu/arm720t/tegra124/cpu.c   |  4 ++--
 arch/arm/include/asm/arch-tegra/pmc.h | 11 +++++++++++
 2 files changed, 13 insertions(+), 2 deletions(-)
diff mbox

Patch

diff --git a/arch/arm/cpu/arm720t/tegra124/cpu.c b/arch/arm/cpu/arm720t/tegra124/cpu.c
index c03aaf17e945..97f5928bd7da 100644
--- a/arch/arm/cpu/arm720t/tegra124/cpu.c
+++ b/arch/arm/cpu/arm720t/tegra124/cpu.c
@@ -252,8 +252,8 @@  void start_cpu(u32 reset_vector)
 	tegra124_init_clocks();
 
 	/* Set power-gating timer multiplier */
-	clrbits_le32(&pmc->pmc_pwrgate_timer_mult, TIMER_MULT_MASK);
-	setbits_le32(&pmc->pmc_pwrgate_timer_mult, MULT_8);
+	writel((MULT_8 << TIMER_MULT_SHIFT) | (MULT_8 << TIMER_MULT_CPU_SHIFT),
+	       &pmc->pmc_pwrgate_timer_mult);
 
 	enable_cpu_power_rail();
 	enable_cpu_clocks();
diff --git a/arch/arm/include/asm/arch-tegra/pmc.h b/arch/arm/include/asm/arch-tegra/pmc.h
index 4c3264b3859b..1dd3154fbccb 100644
--- a/arch/arm/include/asm/arch-tegra/pmc.h
+++ b/arch/arm/include/asm/arch-tegra/pmc.h
@@ -298,14 +298,25 @@  struct pmc_ctlr {
 #define PMC_XOFS_SHIFT	1
 #define PMC_XOFS_MASK	(0x3F << PMC_XOFS_SHIFT)
 
+#if defined(CONFIG_TEGRA114)
 #define TIMER_MULT_SHIFT	0
 #define TIMER_MULT_MASK		(3 << TIMER_MULT_SHIFT)
 #define TIMER_MULT_CPU_SHIFT	2
 #define TIMER_MULT_CPU_MASK	(3 << TIMER_MULT_CPU_SHIFT)
+#elif defined(CONFIG_TEGRA124)
+#define TIMER_MULT_SHIFT	0
+#define TIMER_MULT_MASK		(7 << TIMER_MULT_SHIFT)
+#define TIMER_MULT_CPU_SHIFT	3
+#define TIMER_MULT_CPU_MASK	(7 << TIMER_MULT_CPU_SHIFT)
+#endif
+
 #define MULT_1			0
 #define MULT_2			1
 #define MULT_4			2
 #define MULT_8			3
+#if defined(CONFIG_TEGRA124)
+#define MULT_16			4
+#endif
 
 #define AMAP_WRITE_SHIFT	20
 #define AMAP_WRITE_ON		(1 << AMAP_WRITE_SHIFT)