From patchwork Mon Aug 17 14:23:53 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Antti P Miettinen X-Patchwork-Id: 31519 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4F3E1B6F31 for ; Tue, 18 Aug 2009 00:29:21 +1000 (EST) Received: from localhost ([127.0.0.1]:58473 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Md3D0-00065d-Rc for incoming@patchwork.ozlabs.org; Mon, 17 Aug 2009 10:29:14 -0400 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1Md38Q-0004Lu-VP for qemu-devel@nongnu.org; Mon, 17 Aug 2009 10:24:31 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1Md38J-0004IN-Pg for qemu-devel@nongnu.org; Mon, 17 Aug 2009 10:24:29 -0400 Received: from [199.232.76.173] (port=37283 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Md38I-0004Hq-Ea for qemu-devel@nongnu.org; Mon, 17 Aug 2009 10:24:22 -0400 Received: from lo.gmane.org ([80.91.229.12]:39450) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1Md38H-0008Vo-Ry for qemu-devel@nongnu.org; Mon, 17 Aug 2009 10:24:22 -0400 Received: from list by lo.gmane.org with local (Exim 4.50) id 1Md386-0008FS-Bx for qemu-devel@nongnu.org; Mon, 17 Aug 2009 16:24:10 +0200 Received: from brigitte.kvy.fi ([83.143.58.51]) by main.gmane.org with esmtp (Gmexim 0.1 (Debian)) id 1AlnuQ-0007hv-00 for ; Mon, 17 Aug 2009 16:24:10 +0200 Received: from ananaza by brigitte.kvy.fi with local (Gmexim 0.1 (Debian)) id 1AlnuQ-0007hv-00 for ; Mon, 17 Aug 2009 16:24:10 +0200 X-Injected-Via-Gmane: http://gmane.org/ To: qemu-devel@nongnu.org From: Antti P Miettinen Date: Mon, 17 Aug 2009 17:23:53 +0300 Organization: Domestic Network Association Lines: 150 Message-ID: <87skfqcydi.fsf@brigitte.kvy.fi> References: <4A5C556FA5C54142AE33C414481CE79C16E2B88F1D@mucse404.eu.infineon.com> <200907151149.10228.paul@codesourcery.com> <87ws58yndm.fsf@brigitte.kvy.fi> Mime-Version: 1.0 X-Complaints-To: usenet@ger.gmane.org X-Gmane-NNTP-Posting-Host: brigitte.kvy.fi User-Agent: Gnus/5.110004 (No Gnus v0.4) Emacs/21.4 (gnu/linux) Cancel-Lock: sha1:YyNVUXm189zyS89HoqQt9bI3Kt4= X-detected-operating-system: by monty-python.gnu.org: GNU/Linux 2.6 (newer, 3) Subject: [Qemu-devel] Re: Inquring about Arm11mpcore X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list Reply-To: ananaza@iki.fi List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Antti P Miettinen writes: > Paul Brook writes: >> Make sure you're using the right board. qemu emulates a revB Emulation >> Baseboard plus core tile. This should work out the box. > > Do you have a linux kernel config that should work? Seems that at least recent kernels want to check the PROCID register. The below quick-and-dirty hack allows booting 2.6.30 on realview with arm11mpcore. At least the following config options seem relevant: CONFIG_MACH_REALVIEW_EB=y CONFIG_REALVIEW_EB_ARM11MP=y CONFIG_REALVIEW_EB_ARM11MP_REVB=y # CONFIG_REALVIEW_HIGH_PHYS_OFFSET is not set diff --git a/hw/arm_sysctl.c b/hw/arm_sysctl.c index 11b3787..3884e0d 100644 --- a/hw/arm_sysctl.c +++ b/hw/arm_sysctl.c @@ -23,6 +23,7 @@ typedef struct { uint32_t flags; uint32_t nvflags; uint32_t resetlevel; + uint32_t proc_id; } arm_sysctl_state; static uint32_t arm_sysctl_read(void *opaque, target_phys_addr_t offset) @@ -76,8 +77,11 @@ static uint32_t arm_sysctl_read(void *opaque, target_phys_addr_t offset) case 0x60: /* MISC */ return 0; case 0x84: /* PROCID0 */ - /* ??? Don't know what the proper value for the core tile ID is. */ - return 0x02000000; + /* ??? Don't know what the proper value for the core tile ID is. + * See e.g. Linux arch/arm/mach-realview/include/mach/board-eb.h + * REALVIEW_EB_PROC_XX defines. + */ + return s->proc_id; case 0x88: /* PROCID1 */ return 0xff000000; case 0x64: /* DMAPSR0 */ @@ -204,12 +208,13 @@ static void arm_sysctl_init1(SysBusDevice *dev) } /* Legacy helper function. */ -void arm_sysctl_init(uint32_t base, uint32_t sys_id) +void arm_sysctl_init(uint32_t base, uint32_t sys_id, uint32_t proc_id) { DeviceState *dev; dev = qdev_create(NULL, "realview_sysctl"); qdev_prop_set_uint32(dev, "sys_id", sys_id); + qdev_prop_set_uint32(dev, "proc_id", proc_id); qdev_init(dev); sysbus_mmio_map(sysbus_from_qdev(dev), 0, base); } @@ -220,6 +225,7 @@ static SysBusDeviceInfo arm_sysctl_info = { .qdev.size = sizeof(arm_sysctl_state), .qdev.props = (Property[]) { DEFINE_PROP_UINT32("sys_id", arm_sysctl_state, sys_id, 0), + DEFINE_PROP_UINT32("proc_id", arm_sysctl_state, proc_id, 0), DEFINE_PROP_END_OF_LIST(), } }; diff --git a/hw/primecell.h b/hw/primecell.h index 490ef8c..fb456ad 100644 --- a/hw/primecell.h +++ b/hw/primecell.h @@ -9,6 +9,6 @@ void *pl080_init(uint32_t base, qemu_irq irq, int nchannels); /* arm_sysctl.c */ -void arm_sysctl_init(uint32_t base, uint32_t sys_id); +void arm_sysctl_init(uint32_t base, uint32_t sys_id, uint32_t proc_id); #endif diff --git a/hw/realview.c b/hw/realview.c index 8e176b9..523cab7 100644 --- a/hw/realview.c +++ b/hw/realview.c @@ -19,7 +19,7 @@ /* Board init. */ static struct arm_boot_info realview_binfo = { - .loader_start = 0x0, + .loader_start = 0x0 /*0x70000000*/, .smp_loader_start = 0x80000000, .board_id = 0x33b, }; @@ -40,13 +40,19 @@ static void realview_init(ram_addr_t ram_size, int done_smc = 0; qemu_irq cpu_irq[4]; int ncpu; + uint32_t proc_id = 0; /* ARM7TDMI :-) */ if (!cpu_model) cpu_model = "arm926"; /* FIXME: obey smp_cpus. */ if (strcmp(cpu_model, "arm11mpcore") == 0) { + proc_id = 0x06000000; ncpu = 4; } else { + if (strcmp(cpu_model, "arm926") == 0) + proc_id = 0x02000000; + else if (strcmp(cpu_model, "arm1136") == 0) + proc_id = 0x04000000; ncpu = 1; } @@ -71,7 +77,7 @@ static void realview_init(ram_addr_t ram_size, /* SDRAM at address zero. */ cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM); - arm_sysctl_init(0x10000000, 0xc1400400); + arm_sysctl_init(0x10000000, 0xc1400400, proc_id); if (ncpu == 1) { /* ??? The documentation says GIC1 is nFIQ and either GIC2 or GIC3 diff --git a/hw/versatilepb.c b/hw/versatilepb.c index 3371121..d77674b 100644 --- a/hw/versatilepb.c +++ b/hw/versatilepb.c @@ -170,9 +170,16 @@ static void versatile_init(ram_addr_t ram_size, NICInfo *nd; int n; int done_smc = 0; + uint32_t proc_id = 0; if (!cpu_model) cpu_model = "arm926"; + if (strcmp(cpu_model, "arm11mpcore") == 0) + proc_id = 0x06000000; + else if (strcmp(cpu_model, "arm926") == 0) + proc_id = 0x02000000; + else if (strcmp(cpu_model, "arm1136") == 0) + proc_id = 0x04000000; env = cpu_init(cpu_model); if (!env) { fprintf(stderr, "Unable to find CPU definition\n"); @@ -183,7 +190,7 @@ static void versatile_init(ram_addr_t ram_size, /* SDRAM at address zero. */ cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM); - arm_sysctl_init(0x10000000, 0x41007004); + arm_sysctl_init(0x10000000, 0x41007004, proc_id); cpu_pic = arm_pic_init_cpu(env); dev = sysbus_create_varargs("pl190", 0x10140000, cpu_pic[0], cpu_pic[1], NULL);