@@ -9,7 +9,8 @@ to a given controller with single chip select line, but there are some
hw logics(ex: xilinx zynq qspi) that describes two/dual memories are
connected with a single chip select line from a controller.
-"dual_flash" from include/spi.h describes these types of connection mode
+"dual_flash" from include/spi_flash.h describes these types of connection mode
+in spi flash side and "mode_bits" options for controller driver.
Possible connections:
--------------------
@@ -54,7 +55,7 @@ SF_DUAL_STACKED_FLASH:
by default, if U_PAGE is unset lower memory should accessible,
once user wants to access upper memory need to set U_PAGE.
-SPI_FLASH_CONN_DUALPARALLEL:
+SF_DUAL_PARALLEL_FLASH:
- dual spi/qspi flash memories are connected with a single chipselect
line and these two memories are operating parallel with separate buses.
- xilinx zynq qspi controller has implemented this feature [1]
@@ -73,6 +73,9 @@ based on the selected flash features/operations from spi_slave {} and
spi_flash_params {} - include/spi_flash.h
@dual_flash: flash can be operated in dual flash [3]
+- SF_SINGLE_FLASH: default connection single flash
+- SF_DUAL_STACKED_FLASH: dual flash with dual stacked connection
+- SF_DUAL_PARALLEL_FLASH: dual flash with dual parallel connection
@shift: variable shift operator useful for dual parallel
@poll_cmd: find the read_status or flag_status for polling erase/write operations
@erase_cmd: discovered erase command
Updated the dual_flash documentation as it uses mode_bits from spi drivers to inform the sf framework. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Cc: Marek Vasut <marex@denx.de> --- doc/SPI/README.dual-flash | 5 +++-- doc/SPI/README.sf-features | 3 +++ 2 files changed, 6 insertions(+), 2 deletions(-)