Message ID | 52D7C761.6090605@arm.com |
---|---|
State | New |
Headers | show |
On 16 January 2014 11:49, Alex Velenko <Alex.Velenko@arm.com> wrote: > Hi, > This patch changes get_lane intrinsics to provide a correct big-endian > indexing. This fixes numerous BE load and store issues based on getting > correct lane. > > Is this good for trunk? OK /Marcus
Hi, Can someone, please, commit this patch as I do not have privileges to do so. Kind regards, Alex Velenko On 21/01/14 13:31, Marcus Shawcroft wrote: > On 16 January 2014 11:49, Alex Velenko <Alex.Velenko@arm.com> wrote: >> Hi, >> This patch changes get_lane intrinsics to provide a correct big-endian >> indexing. This fixes numerous BE load and store issues based on getting >> correct lane. >> >> Is this good for trunk? > > OK > /Marcus >
diff --git a/gcc/config/aarch64/aarch64-simd-builtins.def b/gcc/config/aarch64/aarch64-simd-builtins.def index 1dc3c1fe33fdb8148d2ff9c7198e4d85d5dac5d7..d255759713068e64c007cf8a90f57b0fcc0fc288 100644 --- a/gcc/config/aarch64/aarch64-simd-builtins.def +++ b/gcc/config/aarch64/aarch64-simd-builtins.def @@ -49,6 +49,7 @@ BUILTIN_VALL (GETLANE, get_lane, 0) VAR1 (GETLANE, get_lane, 0, di) + BUILTIN_VALL (GETLANE, be_checked_get_lane, 0) BUILTIN_VD_RE (REINTERP, reinterpretdi, 0) BUILTIN_VDC (REINTERP, reinterpretv8qi, 0) diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md index 2f2e74f6bccd54accd265a55cc8dbcfe2db2e76f..2a7b5b12233a55dcbb61632f64ebee8a7f24ac02 100644 --- a/gcc/config/aarch64/aarch64-simd.md +++ b/gcc/config/aarch64/aarch64-simd.md @@ -2062,6 +2062,20 @@ [(set_attr "type" "neon_to_gp<q>")] ) +(define_expand "aarch64_be_checked_get_lane<mode>" + [(match_operand:<VEL> 0 "aarch64_simd_nonimmediate_operand") + (match_operand:VALL 1 "register_operand") + (match_operand:SI 2 "immediate_operand")] + "TARGET_SIMD" + { + operands[2] = GEN_INT (ENDIAN_LANE_N (<MODE>mode, INTVAL (operands[2]))); + emit_insn (gen_aarch64_get_lane<mode> (operands[0], + operands[1], + operands[2])); + DONE; + } +) + ;; Lane extraction of a value, neither sign nor zero extension ;; is guaranteed so upper bits should be considered undefined. (define_insn "aarch64_get_lane<mode>" diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h index 03549bd7a27cccb14ed8cdce91cbd4e4278c273f..33816d4381c8cf271fc4a85db6cc668f6c031dd8 100644 --- a/gcc/config/aarch64/arm_neon.h +++ b/gcc/config/aarch64/arm_neon.h @@ -453,7 +453,7 @@ typedef struct poly16x8x4_t #define __aarch64_vget_lane_any(__size, __cast_ret, __cast_a, __a, __b) \ (__cast_ret \ - __builtin_aarch64_get_lane##__size (__cast_a __a, __b)) + __builtin_aarch64_be_checked_get_lane##__size (__cast_a __a, __b)) #define __aarch64_vget_lane_f32(__a, __b) \ __aarch64_vget_lane_any (v2sf, , , __a, __b)