diff mbox

[PATCH/AARCH64] Add issue_rate tuning field

Message ID CA+=Sn1nM8AStKahFMRUe2JLESVpvAaZNevjdNL8aeL_-qYBGbg@mail.gmail.com
State New
Headers show

Commit Message

Andrew Pinski Jan. 14, 2014, 1:49 a.m. UTC 
Hi,
  While writing a scheduler for Cavium's aarch64 processor (Thunder),
I found there was no way currently to change the issue rate in
back-end.  This patch adds a field (issue_rate) to tune_params and
creates a new function that the middle-end calls.  I updated the
current two tuning variables (generic_tunings and cortexa53_tunings)
to be 1 which was the default before.

OK?  Built and tested for aarch64-elf with no regressions.

Thanks,
Andrew Pinski

ChangeLog:
* config/aarch64/aarch64-protos.h (tune_params): Add issue_rate.
* config/aarch64/aarch64.c (generic_tunings): Add issue rate of 1.
 (cortexa53_tunings): Likewise.
(aarch64_sched_issue_rate): New function.
(TARGET_SCHED_ISSUE_RATE): Define.

Comments

Richard Earnshaw Jan. 14, 2014, 10:15 a.m. UTC | #1 
On 14/01/14 01:49, Andrew Pinski wrote:
> Hi,
>   While writing a scheduler for Cavium's aarch64 processor (Thunder),
> I found there was no way currently to change the issue rate in
> back-end.  This patch adds a field (issue_rate) to tune_params and
> creates a new function that the middle-end calls.  I updated the
> current two tuning variables (generic_tunings and cortexa53_tunings)
> to be 1 which was the default before.
> 
> OK?  Built and tested for aarch64-elf with no regressions.
> 
> Thanks,
> Andrew Pinski
> 
> ChangeLog:
> * config/aarch64/aarch64-protos.h (tune_params): Add issue_rate.
> * config/aarch64/aarch64.c (generic_tunings): Add issue rate of 1.
>  (cortexa53_tunings): Likewise.
> (aarch64_sched_issue_rate): New function.
> (TARGET_SCHED_ISSUE_RATE): Define.
> 
> 

Ug, I'd missed that we weren't setting this.

I think the value should be 2 for both generic and Cortex-A53 (I can't
really envisage single-issue AArch64 systems).

OK with that change (yes I know that wasn't the default before)...

R.
diff mbox

Patch

Index: config/aarch64/aarch64-protos.h
===================================================================
--- config/aarch64/aarch64-protos.h	(revision 206594)
+++ config/aarch64/aarch64-protos.h	(working copy)
@@ -156,6 +156,7 @@  struct tune_params
   const struct cpu_regmove_cost *const regmove_cost;
   const struct cpu_vector_cost *const vec_costs;
   const int memmov_cost;
+  const int issue_rate;
 };
 
 HOST_WIDE_INT aarch64_initial_elimination_offset (unsigned, unsigned);
Index: config/aarch64/aarch64.c
===================================================================
--- config/aarch64/aarch64.c	(revision 206594)
+++ config/aarch64/aarch64.c	(working copy)
@@ -221,7 +221,8 @@  static const struct tune_params generic_
   &generic_addrcost_table,
   &generic_regmove_cost,
   &generic_vector_cost,
-  NAMED_PARAM (memmov_cost, 4)
+  NAMED_PARAM (memmov_cost, 4),
+  NAMED_PARAM (issue_rate, 1)
 };
 
 static const struct tune_params cortexa53_tunings =
@@ -230,7 +231,8 @@  static const struct tune_params cortexa5
   &generic_addrcost_table,
   &generic_regmove_cost,
   &generic_vector_cost,
-  NAMED_PARAM (memmov_cost, 4)
+  NAMED_PARAM (memmov_cost, 4),
+  NAMED_PARAM (issue_rate, 1)
 };
 
 /* A processor implementing AArch64.  */
@@ -4895,6 +4897,13 @@  aarch64_memory_move_cost (enum machine_m
   return aarch64_tune_params->memmov_cost;
 }
 
+/* Return the number of instructions that can be issued per cycle.  */
+static int
+aarch64_sched_issue_rate (void)
+{
+  return aarch64_tune_params->issue_rate;
+}
+
 /* Vectorizer cost model target hooks.  */
 
 /* Implement targetm.vectorize.builtin_vectorization_cost.  */
@@ -8411,6 +8420,9 @@  aarch64_vectorize_vec_perm_const_ok (enu
 #undef TARGET_RTX_COSTS
 #define TARGET_RTX_COSTS aarch64_rtx_costs
 
+#undef TARGET_SCHED_ISSUE_RATE
+#define TARGET_SCHED_ISSUE_RATE aarch64_sched_issue_rate
+
 #undef TARGET_TRAMPOLINE_INIT
 #define TARGET_TRAMPOLINE_INIT aarch64_trampoline_init