Patchwork mtd pxa3xx_nand.c: add support for 2048 bytes page size layout

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Submitter Rodolfo Giometti
Date Jan. 13, 2014, 2:35 p.m.
Message ID <1389623738-19585-1-git-send-email-giometti@linux.it>
Download mbox | patch
Permalink /patch/309968/
State New
Headers show

Comments

Rodolfo Giometti - Jan. 13, 2014, 2:35 p.m.
Signed-off-by: Rodolfo Giometti <giometti@linux.it>
---
 drivers/mtd/nand/pxa3xx_nand.c | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)
Ezequiel Garcia - Jan. 15, 2014, 1:27 p.m.
Hi Rodolfo,

On Mon, Jan 13, 2014 at 03:35:38PM +0100, Rodolfo Giometti wrote:
> Signed-off-by: Rodolfo Giometti <giometti@linux.it>
> ---
>  drivers/mtd/nand/pxa3xx_nand.c | 21 +++++++++++++++++++++
>  1 file changed, 21 insertions(+)
> 

I know this is just a small nitpick, but can you re-submit this
with a subject similar to the other commits:

""mtd: nand: pxa3xx: Add support for 2048 bytes page size devices""

Also, I think you can add some details about the patch in the change
log. Something along these lines might be fine:

""
This commit adds support for devices with 2048B page sizes and
4-bit ECC strength requirements. This is achieved by enabling the BCH
ECC engine, which provides a higher strength: 16-bit over 2048 bytes.

Additionally, add a proper ECC layout to model the controller's view
of the device (where 'U' means unused and 'B' is the bad block marker):

 ----------------------------------------------------
 | 2048B data | B | B | 30B spare | 30B ECC | U | U |
 ----------------------------------------------------
""

With these modifications you can also add:

Acked-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>

Thanks a lot for the contribution!
Brian Norris - Jan. 20, 2014, 7:24 p.m.
On Wed, Jan 15, 2014 at 10:27:25AM -0300, Ezequiel Garcia wrote:
> Hi Rodolfo,
> 
> On Mon, Jan 13, 2014 at 03:35:38PM +0100, Rodolfo Giometti wrote:
> > Signed-off-by: Rodolfo Giometti <giometti@linux.it>
> > ---
> >  drivers/mtd/nand/pxa3xx_nand.c | 21 +++++++++++++++++++++
> >  1 file changed, 21 insertions(+)
> > 
> 
> I know this is just a small nitpick, but can you re-submit this
> with a subject similar to the other commits:
> 
> ""mtd: nand: pxa3xx: Add support for 2048 bytes page size devices""
> 
> Also, I think you can add some details about the patch in the change
> log. Something along these lines might be fine:
> 
> ""
> This commit adds support for devices with 2048B page sizes and
> 4-bit ECC strength requirements. This is achieved by enabling the BCH
> ECC engine, which provides a higher strength: 16-bit over 2048 bytes.
> 
> Additionally, add a proper ECC layout to model the controller's view
> of the device (where 'U' means unused and 'B' is the bad block marker):
> 
>  ----------------------------------------------------
>  | 2048B data | B | B | 30B spare | 30B ECC | U | U |
>  ----------------------------------------------------
> ""
> 
> With these modifications you can also add:
> 
> Acked-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>

I updated the patch with Ezequiel's descriptions and pushed to
l2-mtd.git. Thanks!

Brian

Patch

diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index 31aae53..2a7a0b2 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -286,6 +286,16 @@  static struct nand_bbt_descr bbt_mirror_descr = {
 	.pattern = bbt_mirror_pattern
 };
 
+static struct nand_ecclayout ecc_layout_2KB_bch4bit = {
+	.eccbytes = 32,
+	.eccpos = {
+		32, 33, 34, 35, 36, 37, 38, 39,
+		40, 41, 42, 43, 44, 45, 46, 47,
+		48, 49, 50, 51, 52, 53, 54, 55,
+		56, 57, 58, 59, 60, 61, 62, 63},
+	.oobfree = { {2, 30} }
+};
+
 static struct nand_ecclayout ecc_layout_4KB_bch4bit = {
 	.eccbytes = 64,
 	.eccpos = {
@@ -1360,6 +1370,17 @@  static int pxa_ecc_init(struct pxa3xx_nand_info *info,
 	 * Required ECC: 4-bit correction per 512 bytes
 	 * Select: 16-bit correction per 2048 bytes
 	 */
+	} else if (strength == 4 && ecc_stepsize == 512 && page_size == 2048) {
+		info->ecc_bch = 1;
+		info->chunk_size = 2048;
+		info->spare_size = 32;
+		info->ecc_size = 32;
+		ecc->mode = NAND_ECC_HW;
+		ecc->size = info->chunk_size;
+		ecc->layout = &ecc_layout_2KB_bch4bit;
+		ecc->strength = 16;
+		return 1;
+
 	} else if (strength == 4 && ecc_stepsize == 512 && page_size == 4096) {
 		info->ecc_bch = 1;
 		info->chunk_size = 2048;