From patchwork Mon Jan 13 10:34:50 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 309789 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 37C722C007E for ; Mon, 13 Jan 2014 21:40:20 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751214AbaAMKkQ (ORCPT ); Mon, 13 Jan 2014 05:40:16 -0500 Received: from top.free-electrons.com ([176.31.233.9]:60962 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751730AbaAMKkJ (ORCPT ); Mon, 13 Jan 2014 05:40:09 -0500 Received: by mail.free-electrons.com (Postfix, from userid 106) id 9CC11827; Mon, 13 Jan 2014 11:40:08 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.3.2 (2011-06-06) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT shortcircuit=ham autolearn=disabled version=3.3.2 Received: from localhost (189.58.26.109.rev.sfr.net [109.26.58.189]) by mail.free-electrons.com (Postfix) with ESMTPSA id 5DBDE155; Mon, 13 Jan 2014 11:40:08 +0100 (CET) From: Maxime Ripard To: Wolfram Sang Cc: linux-i2c@vger.kernel.org, kevin.z.m.zh@gmail.com, sunny@allwinnertech.com, shuge@allwinnertech.com, zhuzhenhua@allwinnertech.com, linux-arm-kernel@lists.infradead.org, duanmintao@allwinnertech.com, linux-sunxi@googlegroups.com, Maxime Ripard Subject: [PATCH v2 2/5] i2c: mv64xxx: Add support for the Allwinner A31 I2C driver Date: Mon, 13 Jan 2014 11:34:50 +0100 Message-Id: <1389609293-2824-3-git-send-email-maxime.ripard@free-electrons.com> X-Mailer: git-send-email 1.8.4.2 In-Reply-To: <1389609293-2824-1-git-send-email-maxime.ripard@free-electrons.com> References: <1389609293-2824-1-git-send-email-maxime.ripard@free-electrons.com> Sender: linux-i2c-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org The Allwinner A31 I2C controller is almost identical to the one used in the other Allwinner SoCs, except for the fact that it needs to clear the interrupt by setting the INT_FLAGS bit in the control register, instead of clearing it. Signed-off-by: Maxime Ripard Reviewed-by: Gregory CLEMENT Tested-by: Gregory CLEMENT --- Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt | 9 ++++++--- drivers/i2c/busses/i2c-mv64xxx.c | 10 ++++++++++ 2 files changed, 16 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt b/Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt index 603003a..2763225 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt +++ b/Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt @@ -4,15 +4,18 @@ Required properties : - reg : Offset and length of the register set for the device - - compatible : Should be "marvell,mv64xxx-i2c" or "allwinner,sun4i-i2c" - or "marvell,mv78230-i2c" + - compatible : Should be "marvell,mv64xxx-i2c", "allwinner,sun4i-i2c", + "marvell,mv78230-i2c" or "allwinner,sun6i-a31-i2c" - interrupts : The interrupt number Optional properties : - clock-frequency : Desired I2C bus clock frequency in Hz. If not set the default frequency is 100kHz - - resets : phandle to the parent reset controller + + - resets : phandle to the parent reset controller. Mandatory + whenever you're using the "allwinner,sun6i-a31-i2c" + compatible. Examples: diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c index 0f6dde5..12ecf4b 100644 --- a/drivers/i2c/busses/i2c-mv64xxx.c +++ b/drivers/i2c/busses/i2c-mv64xxx.c @@ -151,6 +151,7 @@ struct mv64xxx_i2c_data { /* 5us delay in order to avoid repeated start timing violation */ bool errata_delay; struct reset_control *rstc; + bool irq_clear_inverted; }; static struct mv64xxx_i2c_regs mv64xxx_i2c_regs_mv64xxx = { @@ -568,6 +569,11 @@ mv64xxx_i2c_intr(int irq, void *dev_id) status = readl(drv_data->reg_base + drv_data->reg_offsets.status); mv64xxx_i2c_fsm(drv_data, status); mv64xxx_i2c_do_action(drv_data); + + if (drv_data->irq_clear_inverted) + writel(drv_data->cntl_bits | MV64XXX_I2C_REG_CONTROL_IFLG, + drv_data->reg_base + drv_data->reg_offsets.control); + rc = IRQ_HANDLED; } spin_unlock_irqrestore(&drv_data->lock, flags); @@ -692,6 +698,7 @@ static const struct i2c_algorithm mv64xxx_i2c_algo = { */ static const struct of_device_id mv64xxx_i2c_of_match_table[] = { { .compatible = "allwinner,sun4i-i2c", .data = &mv64xxx_i2c_regs_sun4i}, + { .compatible = "allwinner,sun6i-a31-i2c", .data = &mv64xxx_i2c_regs_sun4i}, { .compatible = "marvell,mv64xxx-i2c", .data = &mv64xxx_i2c_regs_mv64xxx}, { .compatible = "marvell,mv78230-i2c", .data = &mv64xxx_i2c_regs_mv64xxx}, {} @@ -795,6 +802,9 @@ mv64xxx_of_config(struct mv64xxx_i2c_data *drv_data, drv_data->errata_delay = true; } + if (of_device_is_compatible(np, "allwinner,sun6i-a31-i2c")) + drv_data->irq_clear_inverted = true; + out: return rc; #endif