From patchwork Mon Jan 13 10:34:51 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxime Ripard X-Patchwork-Id: 309788 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id A5C6E2C0089 for ; Mon, 13 Jan 2014 21:40:19 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751793AbaAMKkO (ORCPT ); Mon, 13 Jan 2014 05:40:14 -0500 Received: from top.free-electrons.com ([176.31.233.9]:60967 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751792AbaAMKkJ (ORCPT ); Mon, 13 Jan 2014 05:40:09 -0500 Received: by mail.free-electrons.com (Postfix, from userid 106) id 5345C832; Mon, 13 Jan 2014 11:40:09 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.3.2 (2011-06-06) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT shortcircuit=ham autolearn=disabled version=3.3.2 Received: from localhost (189.58.26.109.rev.sfr.net [109.26.58.189]) by mail.free-electrons.com (Postfix) with ESMTPSA id DA651155; Mon, 13 Jan 2014 11:40:08 +0100 (CET) From: Maxime Ripard To: Wolfram Sang Cc: linux-i2c@vger.kernel.org, kevin.z.m.zh@gmail.com, sunny@allwinnertech.com, shuge@allwinnertech.com, zhuzhenhua@allwinnertech.com, linux-arm-kernel@lists.infradead.org, duanmintao@allwinnertech.com, linux-sunxi@googlegroups.com, Maxime Ripard Subject: [PATCH v2 3/5] ARM: sun6i: Enable the I2C controllers Date: Mon, 13 Jan 2014 11:34:51 +0100 Message-Id: <1389609293-2824-4-git-send-email-maxime.ripard@free-electrons.com> X-Mailer: git-send-email 1.8.4.2 In-Reply-To: <1389609293-2824-1-git-send-email-maxime.ripard@free-electrons.com> References: <1389609293-2824-1-git-send-email-maxime.ripard@free-electrons.com> Sender: linux-i2c-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org The A31 has 4 I2C controllers that are the same than the one in the other Allwinner SoCs, except for the fact that they are asserted in reset by the reset unit. Add these i2c controllers to the DTSI. Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun6i-a31.dtsi | 40 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi index 5256ad9..7dac496 100644 --- a/arch/arm/boot/dts/sun6i-a31.dtsi +++ b/arch/arm/boot/dts/sun6i-a31.dtsi @@ -312,6 +312,46 @@ status = "disabled"; }; + i2c0: i2c@01c2ac00 { + compatible = "allwinner,sun6i-a31-i2c"; + reg = <0x01c2ac00 0x400>; + interrupts = <0 6 4>; + clocks = <&apb2_gates 0>; + clock-frequency = <100000>; + resets = <&apb2_rst 0>; + status = "disabled"; + }; + + i2c1: i2c@01c2b000 { + compatible = "allwinner,sun6i-a31-i2c"; + reg = <0x01c2b000 0x400>; + interrupts = <0 7 4>; + clocks = <&apb2_gates 1>; + clock-frequency = <100000>; + resets = <&apb2_rst 1>; + status = "disabled"; + }; + + i2c2: i2c@01c2b400 { + compatible = "allwinner,sun6i-a31-i2c"; + reg = <0x01c2b400 0x400>; + interrupts = <0 8 4>; + clocks = <&apb2_gates 2>; + clock-frequency = <100000>; + resets = <&apb2_rst 2>; + status = "disabled"; + }; + + i2c3: i2c@01c2b800 { + compatible = "allwinner,sun6i-a31-i2c"; + reg = <0x01c2b800 0x400>; + interrupts = <0 9 4>; + clocks = <&apb2_gates 3>; + clock-frequency = <100000>; + resets = <&apb2_rst 3>; + status = "disabled"; + }; + gic: interrupt-controller@01c81000 { compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic"; reg = <0x01c81000 0x1000>,