Patchwork [U-Boot,2/3,V3] esdhc: Detecting 8 bit width before mmc initialization

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Submitter Haijun.Zhang
Date Jan. 10, 2014, 5:52 a.m.
Message ID <1389333139-26841-2-git-send-email-haijun.zhang@freescale.com>
Download mbox | patch
Permalink /patch/309167/
State Accepted
Delegated to: York Sun
Headers show

Comments

Haijun.Zhang - Jan. 10, 2014, 5:52 a.m.
The upper 4 data signals of esdhc are shared with spi flash.
So detect if the upper 4 pins are assigned to esdhc before
enable sdhc 8 bit width.

Signed-off-by: Haijun Zhang <haijun.zhang@freescale.com>
---
changes for V3:
        - Define quirk in board specific file instead of code in driver
changes for V2:
	- No changes

 drivers/mmc/fsl_esdhc.c    | 5 +++++
 include/configs/T4240QDS.h | 3 +++
 2 files changed, 8 insertions(+)
Pantelis Antoniou - Jan. 22, 2014, noon
Hi Haijun,

On Jan 10, 2014, at 7:52 AM, Haijun Zhang wrote:

> The upper 4 data signals of esdhc are shared with spi flash.
> So detect if the upper 4 pins are assigned to esdhc before
> enable sdhc 8 bit width.
> 
> Signed-off-by: Haijun Zhang <haijun.zhang@freescale.com>
> ---
> changes for V3:
>        - Define quirk in board specific file instead of code in driver
> changes for V2:
> 	- No changes
> 
> drivers/mmc/fsl_esdhc.c    | 5 +++++
> include/configs/T4240QDS.h | 3 +++
> 2 files changed, 8 insertions(+)
> 
> diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
> index 2ee93cd..72ca109 100644
> --- a/drivers/mmc/fsl_esdhc.c
> +++ b/drivers/mmc/fsl_esdhc.c
> @@ -644,6 +644,11 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)
> 	if (caps & ESDHC_HOSTCAPBLT_HSS)
> 		mmc->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
> 
> +#ifdef CONFIG_ESDHC_DETECT_8_BIT_QUIRK
> +	if (CONFIG_ESDHC_DETECT_8_BIT_QUIRK)
> +		mmc->host_caps &= ~MMC_MODE_8BIT;
> +#endif
> +
> 	mmc->f_min = 400000;
> 	mmc->f_max = MIN(gd->arch.sdhc_clk, 52000000);
> 
> diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h
> index 0e0b346..275a7a8 100644
> --- a/include/configs/T4240QDS.h
> +++ b/include/configs/T4240QDS.h
> @@ -167,6 +167,7 @@ unsigned long get_board_ddr_clk(void);
> #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE	0x08
> #define QIXIS_BRDCFG5			0x55
> #define QIXIS_MUX_SDHC			2
> +#define QIXIS_MUX_SDHC_WIDTH8		1
> #define QIXIS_BASE_PHYS		(0xf00000000ull | QIXIS_BASE)
> 
> #define CONFIG_SYS_CSPR3_EXT	(0xf)
> @@ -471,6 +472,8 @@ unsigned long get_board_ddr_clk(void);
> #define CONFIG_ESDHC_DETECT_QUIRK \
> 	(!(readb(QIXIS_BASE + QIXIS_BRDCFG5) & QIXIS_MUX_SDHC) || \
> 	IS_SVR_REV(get_svr(), 1, 0))
> +#define CONFIG_ESDHC_DETECT_8_BIT_QUIRK \
> +	(!(readb(QIXIS_BASE + QIXIS_BRDCFG5) & QIXIS_MUX_SDHC_WIDTH8))
> #endif
> 
> #define CONFIG_BOOTDELAY	10	/* -1 disables auto-boot */
> -- 
> 1.8.4.1
> 
> 

Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>

Patch

diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 2ee93cd..72ca109 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -644,6 +644,11 @@  int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)
 	if (caps & ESDHC_HOSTCAPBLT_HSS)
 		mmc->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
 
+#ifdef CONFIG_ESDHC_DETECT_8_BIT_QUIRK
+	if (CONFIG_ESDHC_DETECT_8_BIT_QUIRK)
+		mmc->host_caps &= ~MMC_MODE_8BIT;
+#endif
+
 	mmc->f_min = 400000;
 	mmc->f_max = MIN(gd->arch.sdhc_clk, 52000000);
 
diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h
index 0e0b346..275a7a8 100644
--- a/include/configs/T4240QDS.h
+++ b/include/configs/T4240QDS.h
@@ -167,6 +167,7 @@  unsigned long get_board_ddr_clk(void);
 #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE	0x08
 #define QIXIS_BRDCFG5			0x55
 #define QIXIS_MUX_SDHC			2
+#define QIXIS_MUX_SDHC_WIDTH8		1
 #define QIXIS_BASE_PHYS		(0xf00000000ull | QIXIS_BASE)
 
 #define CONFIG_SYS_CSPR3_EXT	(0xf)
@@ -471,6 +472,8 @@  unsigned long get_board_ddr_clk(void);
 #define CONFIG_ESDHC_DETECT_QUIRK \
 	(!(readb(QIXIS_BASE + QIXIS_BRDCFG5) & QIXIS_MUX_SDHC) || \
 	IS_SVR_REV(get_svr(), 1, 0))
+#define CONFIG_ESDHC_DETECT_8_BIT_QUIRK \
+	(!(readb(QIXIS_BASE + QIXIS_BRDCFG5) & QIXIS_MUX_SDHC_WIDTH8))
 #endif
 
 #define CONFIG_BOOTDELAY	10	/* -1 disables auto-boot */