Index: gcc/testsuite/gcc.dg/tree-ssa/reassoc-32.c
===================================================================
--- gcc/testsuite/gcc.dg/tree-ssa/reassoc-32.c	2014-01-08 22:11:48.552943720 +0000
+++ gcc/testsuite/gcc.dg/tree-ssa/reassoc-32.c	2014-01-08 22:11:50.069956983 +0000
@@ -1,7 +1,7 @@
 /* { dg-do run { target { ! "m68k*-*-* mmix*-*-* mep*-*-* bfin*-*-* v850*-*-* picochip*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-*"} } } */
 
 /* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */
-/* { dg-additional-options "-mbranch-cost=2" { target avr-*-* } } */
+/* { dg-additional-options "-mbranch-cost=2" { target mips*-*-* avr-*-* } } */
 
 
 int test (int a, int b, int c)
Index: gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c
===================================================================
--- gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c	2014-01-08 22:11:48.553943729 +0000
+++ gcc/testsuite/gcc.dg/tree-ssa/reassoc-33.c	2014-01-08 22:11:50.070956992 +0000
@@ -1,7 +1,7 @@
 /* { dg-do run { target { ! "m68k*-*-* mmix*-*-* mep*-*-* bfin*-*-* v850*-*-* picochip*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* hppa*-*-*"} } } */
 
 /* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */
-/* { dg-additional-options "-mbranch-cost=2" { target avr-*-* } } */
+/* { dg-additional-options "-mbranch-cost=2" { target mips*-*-* avr-*-* } } */
 
 int test (int a, int b, int c)
 {
Index: gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c
===================================================================
--- gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c	2014-01-08 22:11:48.552943720 +0000
+++ gcc/testsuite/gcc.dg/tree-ssa/reassoc-34.c	2014-01-08 22:11:50.070956992 +0000
@@ -1,7 +1,7 @@
 /* { dg-do run { target { ! "m68k*-*-* mmix*-*-* mep*-*-* bfin*-*-* v850*-*-* picochip*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* hppa*-*-*"} } } */
 
 /* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */
-/* { dg-additional-options "-mbranch-cost=2" { target avr-*-* } } */
+/* { dg-additional-options "-mbranch-cost=2" { target mips*-*-* avr-*-* } } */
 
 int test (int a, int b, int c)
 {
Index: gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c
===================================================================
--- gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c	2014-01-08 22:11:48.553943729 +0000
+++ gcc/testsuite/gcc.dg/tree-ssa/reassoc-35.c	2014-01-08 22:11:50.070956992 +0000
@@ -1,7 +1,7 @@
 /* { dg-do run { target { ! "m68k*-*-* mmix*-*-* mep*-*-* bfin*-*-* v850*-*-* picochip*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* hppa*-*-*"} } } */
 
 /* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */
-/* { dg-additional-options "-mbranch-cost=2" { target avr-*-* } } */
+/* { dg-additional-options "-mbranch-cost=2" { target mips*-*-* avr-*-* } } */
 
 int test (unsigned int a, int b, int c)
 {
Index: gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c
===================================================================
--- gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c	2014-01-08 22:11:48.553943729 +0000
+++ gcc/testsuite/gcc.dg/tree-ssa/reassoc-36.c	2014-01-08 22:11:50.070956992 +0000
@@ -1,7 +1,7 @@
 /* { dg-do run { target { ! "m68k*-*-* mmix*-*-* mep*-*-* bfin*-*-* v850*-*-* picochip*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* hppa*-*-*"} } } */
 
 /* { dg-options "-O2 -fno-inline -fdump-tree-reassoc1-details" } */
-/* { dg-additional-options "-mbranch-cost=2" { target avr-*-* } } */
+/* { dg-additional-options "-mbranch-cost=2" { target mips*-*-* avr-*-* } } */
 
 int test (int a, int b, int c)
 {
Index: gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-1.c
===================================================================
--- gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-1.c	2014-01-08 22:11:48.552943720 +0000
+++ gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-1.c	2014-01-08 22:11:50.070956992 +0000
@@ -1,4 +1,4 @@
-/* { dg-do compile { target { ! "m68k*-*-* mmix*-*-* mep*-*-* bfin*-*-* v850*-*-* picochip*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-*"} } } */
+/* { dg-do compile { target { ! "m68k*-*-* mmix*-*-* mep*-*-* bfin*-*-* v850*-*-* picochip*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-* mips*-*-*"} } } */
 
 /* { dg-options "-O2 -g -fdump-tree-optimized" } */
 /* { dg-additional-options "-mbranch-cost=2" { target avr-*-* } } */
Index: gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-4.c
===================================================================
--- gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-4.c	2014-01-08 22:11:48.552943720 +0000
+++ gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-4.c	2014-01-08 22:11:50.071957001 +0000
@@ -1,4 +1,4 @@
-/* { dg-do compile { target { ! "m68k*-*-* mmix*-*-* mep*-*-* bfin*-*-* v850*-*-* picochip*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-*"} } } */
+/* { dg-do compile { target { ! "m68k*-*-* mmix*-*-* mep*-*-* bfin*-*-* v850*-*-* picochip*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-* mips*-*-*"} } } */
 
 /* { dg-options "-O2 -g -fdump-tree-optimized" } */
 /* { dg-additional-options "-mbranch-cost=2" { target avr-*-* } } */
Index: gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-5.c
===================================================================
--- gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-5.c	2014-01-08 22:11:48.552943720 +0000
+++ gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-5.c	2014-01-08 22:11:50.071957001 +0000
@@ -1,4 +1,4 @@
-/* { dg-do compile { target { ! "m68k*-*-* mmix*-*-* mep*-*-* bfin*-*-* v850*-*-* picochip*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-*"} } } */
+/* { dg-do compile { target { ! "m68k*-*-* mmix*-*-* mep*-*-* bfin*-*-* v850*-*-* picochip*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-* mips*-*-*"} } } */
 
 /* { dg-options "-O2 -g -fdump-tree-optimized" } */
 /* { dg-additional-options "-mbranch-cost=2" { target avr-*-* } } */
Index: gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-6.c
===================================================================
--- gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-6.c	2014-01-08 22:11:48.552943720 +0000
+++ gcc/testsuite/gcc.dg/tree-ssa/ssa-ifcombine-ccmp-6.c	2014-01-08 22:11:50.071957001 +0000
@@ -1,4 +1,4 @@
-/* { dg-do compile { target { ! "m68k*-*-* mmix*-*-* mep*-*-* bfin*-*-* v850*-*-* picochip*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-*"} } } */
+/* { dg-do compile { target { ! "m68k*-*-* mmix*-*-* mep*-*-* bfin*-*-* v850*-*-* picochip*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-* mips*-*-*"} } } */
 
 /* { dg-options "-O2 -g -fdump-tree-optimized" } */
 /* { dg-additional-options "-mbranch-cost=2" { target avr-*-* } } */
Index: gcc/testsuite/gcc.dg/tree-ssa/vrp87.c
===================================================================
--- gcc/testsuite/gcc.dg/tree-ssa/vrp87.c	2014-01-08 22:11:48.553943729 +0000
+++ gcc/testsuite/gcc.dg/tree-ssa/vrp87.c	2014-01-08 22:11:50.071957001 +0000
@@ -1,7 +1,7 @@
-/* { dg-do compile { target { ! "m68k*-*-* mmix*-*-* mep*-*-* bfin*-*-* v850*-*-* picochip*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-* hppa*-*-*"} } } */
+/* { dg-do compile { target { ! "m68k*-*-* mmix*-*-* mep*-*-* bfin*-*-* v850*-*-* picochip*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-* hppa*-*-* mips*-*-*"} } } */
 
 /* { dg-options "-O2 -fdump-tree-vrp2-details -fdump-tree-cddce2-details" } */
-/* { dg-additional-options "-mbranch-cost=2" { target avr-*-* } } */
+/* { dg-additional-options "-mbranch-cost=2" { target mips*-*-* avr-*-* } } */
 /* Skip on ARM Cortex-M, where LOGICAL_OP_NON_SHORT_CIRCUIT is set to false,
    leading to two conditional jumps when evaluating an && condition.  VRP is
    not able to optimize this.  */
Index: gcc/testsuite/gcc.dg/tree-ssa/forwprop-28.c
===================================================================
--- gcc/testsuite/gcc.dg/tree-ssa/forwprop-28.c	2014-01-08 22:11:48.553943729 +0000
+++ gcc/testsuite/gcc.dg/tree-ssa/forwprop-28.c	2014-01-08 22:11:50.071957001 +0000
@@ -1,4 +1,4 @@
-/* { dg-do compile { target { ! "m68k*-*-* mmix*-*-* mep*-*-* bfin*-*-* v850*-*-* picochip*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-* hppa*-*-*"} } } */
+/* { dg-do compile { target { ! "m68k*-*-* mmix*-*-* mep*-*-* bfin*-*-* v850*-*-* picochip*-*-* moxie*-*-* cris*-*-* m32c*-*-* fr30*-*-* mcore*-*-* powerpc*-*-* xtensa*-*-* arc*-*-* hppa*-*-* mips*-*-*"} } } */
 /* { dg-options "-O2 -fdump-tree-forwprop1" } */
 /* Skip on ARM Cortex-M, where LOGICAL_OP_NON_SHORT_CIRCUIT is set to false,
    leading to two conditional jumps when evaluating an && condition.  Forwprop1
