diff mbox

[AArch64,2/6] aarch64: Add mulditi3 and umulditi3 patterns

Message ID 1389204801-9832-3-git-send-email-rth@redhat.com
State New
Headers show

Commit Message

Richard Henderson Jan. 8, 2014, 6:13 p.m. UTC
* config/aarch64/aarch64.md (<su_optab>mulditi3): New expander.
---
 gcc/config/aarch64/aarch64.md | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

Comments

Marcus Shawcroft April 22, 2014, 10 a.m. UTC | #1
On 8 January 2014 18:13, Richard Henderson <rth@redhat.com> wrote:
>         * config/aarch64/aarch64.md (<su_optab>mulditi3): New expander.
> ---
>  gcc/config/aarch64/aarch64.md | 17 +++++++++++++++++
>  1 file changed, 17 insertions(+)
>
> diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
> index c4acdfc..0b3943d 100644
> --- a/gcc/config/aarch64/aarch64.md
> +++ b/gcc/config/aarch64/aarch64.md
> @@ -2078,6 +2078,23 @@
>    [(set_attr "type" "<su>mull")]
>  )
>
> +(define_expand "<su_optab>mulditi3"
> +  [(set (match_operand:TI 0 "register_operand")
> +       (mult:TI (ANY_EXTEND:TI (match_operand:DI 1 "register_operand"))
> +                (ANY_EXTEND:TI (match_operand:DI 2 "register_operand"))))]
> +  ""
> +{
> +  rtx low = gen_reg_rtx (DImode);
> +  emit_insn (gen_muldi3 (low, operands[1], operands[2]));
> +
> +  rtx high = gen_reg_rtx (DImode);
> +  emit_insn (gen_<su>muldi3_highpart (high, operands[1], operands[2]));
> +
> +  emit_move_insn (gen_lowpart (DImode, operands[0]), low);
> +  emit_move_insn (gen_highpart (DImode, operands[0]), high);
> +  DONE;
> +})
> +
>  (define_insn "<su>muldi3_highpart"
>    [(set (match_operand:DI 0 "register_operand" "=r")
>         (truncate:DI
> --
> 1.8.4.2
>


I think this should go in now we are in stage-1.... /Marcus
diff mbox

Patch

diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index c4acdfc..0b3943d 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -2078,6 +2078,23 @@ 
   [(set_attr "type" "<su>mull")]
 )
 
+(define_expand "<su_optab>mulditi3"
+  [(set (match_operand:TI 0 "register_operand")
+	(mult:TI (ANY_EXTEND:TI (match_operand:DI 1 "register_operand"))
+		 (ANY_EXTEND:TI (match_operand:DI 2 "register_operand"))))]
+  ""
+{
+  rtx low = gen_reg_rtx (DImode);
+  emit_insn (gen_muldi3 (low, operands[1], operands[2]));
+
+  rtx high = gen_reg_rtx (DImode);
+  emit_insn (gen_<su>muldi3_highpart (high, operands[1], operands[2]));
+
+  emit_move_insn (gen_lowpart (DImode, operands[0]), low);
+  emit_move_insn (gen_highpart (DImode, operands[0]), high);
+  DONE;
+})
+
 (define_insn "<su>muldi3_highpart"
   [(set (match_operand:DI 0 "register_operand" "=r")
 	(truncate:DI