diff mbox

[committed] Fix PR target/59652: reload problem for 14-bit register offsets

Message ID BLU0-SMTP31E58B982127C1FADCF52E97B10@phx.gbl
State New
Headers show

Commit Message

John David Anglin Jan. 8, 2014, 2:23 a.m. UTC
The attached change is more a work around than a true fix.

Occasionally with 4.8 and 4.9, there is a reload problem with 14-bit  
register offsets.  The problem occurs
when both the offset and the register need reloading.  It occurs when  
the register is equivalent to a
SYMBOL_REF and the insn is separated from the original SET by a call.   
In this case, only the offset
is reloaded and the register doesn't get assigned a register.

More details are in PR.

The attached change fixes the problem by not generating insns with 14- 
bit register offsets except for
cases where the offset won't need reloading.  In many cases, reload  
undos what CSE has done, so
there's not much of a performance impact.

The regression was introduced in converting GO_IF_LEGITIMATE_ADDRESS  
to pa_legitimate_address_p().

Tested on hppa2.0w-hp-hpux11.11, hppa64-hp-hpux11.11 and hppa-unknown- 
linux-gnu.  Committed
to trunk and 4.8 branch.

Dave
--
John David Anglin	dave.anglin@bell.net
2014-01-07  John David Anglin  <danglin@gcc.gnu.org>

	PR target/59652
	* config/pa/pa.c (pa_legitimate_address_p): Return false before reload
	for 14-bit register offsets when INT14_OK_STRICT is false.
diff mbox

Patch

Index: config/pa/pa.c
===================================================================
--- config/pa/pa.c	(revision 206321)
+++ config/pa/pa.c	(working copy)
@@ -10522,13 +10522,13 @@ 
 
 	  /* When INT14_OK_STRICT is false, a secondary reload is needed
 	     to adjust the displacement of SImode and DImode floating point
-	     instructions.  So, we return false when STRICT is true.  We
+	     instructions but this may fail when the register also needs
+	     reloading.  So, we return false when STRICT is true.  We
 	     also reject long displacements for float mode addresses since
 	     the majority of accesses will use floating point instructions
 	     that don't support 14-bit offsets.  */
 	  if (!INT14_OK_STRICT
-	      && reload_in_progress
-	      && strict
+	      && (strict || !(reload_in_progress || reload_completed))
 	      && mode != QImode
 	      && mode != HImode)
 	    return false;
@@ -10588,8 +10588,7 @@ 
 	    return true;
 
 	  if (!INT14_OK_STRICT
-	      && reload_in_progress
-	      && strict
+	      && (strict || !(reload_in_progress || reload_completed))
 	      && mode != QImode
 	      && mode != HImode)
 	    return false;