diff mbox

[PULL,26/49] target-i386: Remove gen_op_mov*_A0_im

Message ID 1389128439-10067-27-git-send-email-rth@twiddle.net
State New
Headers show

Commit Message

Richard Henderson Jan. 7, 2014, 9 p.m. UTC 
Propagate the definitions into all users.  In two cases, this allows
us to share code between the 32-bit and 64-bit immediate moves.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 target-i386/translate.c | 17 ++---------------
 1 file changed, 2 insertions(+), 15 deletions(-)
diff mbox

Patch

diff --git a/target-i386/translate.c b/target-i386/translate.c
index 59554aa..ade8606 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -252,18 +252,6 @@  static void gen_update_cc_op(DisasContext *s)
     }
 }
 
-static inline void gen_op_movl_A0_im(uint32_t val)
-{
-    tcg_gen_movi_tl(cpu_A0, val);
-}
-
-#ifdef TARGET_X86_64
-static inline void gen_op_movq_A0_im(int64_t val)
-{
-    tcg_gen_movi_tl(cpu_A0, val);
-}
-#endif
-
 static inline void gen_movtl_T0_im(target_ulong val)
 {
     tcg_gen_movi_tl(cpu_T[0], val);
@@ -2046,7 +2034,7 @@  static void gen_lea_modrm(CPUX86State *env, DisasContext *s, int modrm)
             if (rm == 6) {
                 disp = cpu_lduw_code(env, s->pc);
                 s->pc += 2;
-                gen_op_movl_A0_im(disp);
+                tcg_gen_movi_tl(cpu_A0, disp);
                 rm = 0; /* avoid SS override */
                 goto no_rm;
             } else {
@@ -5619,7 +5607,6 @@  static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
             if (s->aflag == 2) {
                 offset_addr = cpu_ldq_code(env, s->pc);
                 s->pc += 8;
-                gen_op_movq_A0_im(offset_addr);
             } else
 #endif
             {
@@ -5628,8 +5615,8 @@  static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
                 } else {
                     offset_addr = insn_get(env, s, MO_16);
                 }
-                gen_op_movl_A0_im(offset_addr);
             }
+            tcg_gen_movi_tl(cpu_A0, offset_addr);
             gen_add_A0_ds_seg(s);
             if ((b & 2) == 0) {
                 gen_op_ld_v(s, ot, cpu_T[0], cpu_A0);