From patchwork Mon Dec 23 16:27:05 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter De Schrijver X-Patchwork-Id: 304922 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id AC3BF2C00B7 for ; Tue, 24 Dec 2013 20:29:45 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751499Ab3LXJ3o (ORCPT ); Tue, 24 Dec 2013 04:29:44 -0500 Received: from hqemgate15.nvidia.com ([216.228.121.64]:5366 "EHLO hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751389Ab3LXJ3m (ORCPT ); Tue, 24 Dec 2013 04:29:42 -0500 Received: from hqnvupgp08.nvidia.com (Not Verified[216.228.121.13]) by hqemgate15.nvidia.com id ; Tue, 24 Dec 2013 01:29:44 -0800 Received: from hqemhub03.nvidia.com ([172.20.12.94]) by hqnvupgp08.nvidia.com (PGP Universal service); Tue, 24 Dec 2013 01:30:40 -0800 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Tue, 24 Dec 2013 01:30:40 -0800 Received: from HQMAIL104.nvidia.com (172.18.146.11) by hqemhub03.nvidia.com (172.20.150.15) with Microsoft SMTP Server (TLS) id 8.3.327.1; Tue, 24 Dec 2013 01:29:42 -0800 Received: from HQMAIL104.nvidia.com (172.18.146.11) by HQMAIL104.nvidia.com (172.18.146.11) with Microsoft SMTP Server (TLS) id 15.0.712.24; Tue, 24 Dec 2013 01:29:41 -0800 Received: from deemhub02.nvidia.com (10.21.69.138) by HQMAIL104.nvidia.com (172.18.146.11) with Microsoft SMTP Server (TLS) id 15.0.712.24 via Frontend Transport; Tue, 24 Dec 2013 01:29:41 -0800 Received: from tbergstrom-lnx.Nvidia.com (10.21.65.27) by deemhub02.nvidia.com (10.21.69.138) with Microsoft SMTP Server id 8.3.327.1; Tue, 24 Dec 2013 10:29:39 +0100 Received: by tbergstrom-lnx.Nvidia.com (Postfix, from userid 1002) id 3152320544; Mon, 23 Dec 2013 18:27:05 +0200 (EET) Date: Mon, 23 Dec 2013 18:27:05 +0200 From: Peter De Schrijver To: CC: Prashant Gaikwad , "swarren@wwwdotorg.org" , "thierry.reding@gmail.com" , "rob.herring@calxeda.com" , "pawel.moll@arm.com" , "mark.rutland@arm.com" , "linux-kernel@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-tegra@vger.kernel.org" Subject: pull request for some small fixes Message-ID: <20131223162705.GE3378@tbergstrom-lnx.Nvidia.com> MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org The following changes since commit 62ce7cd62f534023224912dc9b909963f26a38da: clk: tegra: fix __clk_lookup() return value checks (2013-11-28 15:09:22 +0200) are available in the git repository at: git://nv-tegra.nvidia.com/user/pdeschrijver/linux.git clk-tegra-next-1 Peter De Schrijver (1): clk: tegra: Add missing Tegra20 fuse clks Thierry Reding (1): clk: tegra: Correct clock number for UARTE drivers/clk/tegra/clk-tegra-periph.c | 2 +- drivers/clk/tegra/clk-tegra20.c | 2 ++ 2 files changed, 3 insertions(+), 1 deletions(-) --- To unsubscribe from this list: send the line "unsubscribe linux-tegra" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html