call ide_reset when resetting the piix

Submitted by Naphtali Sprei on Aug. 2, 2009, 3:29 p.m.

Details

Message ID 4A75B0D1.5030306@redhat.com
State Superseded
Headers show

Commit Message

Naphtali Sprei Aug. 2, 2009, 3:29 p.m.
Anthony Liguori wrote:
> Naphtali Sprei wrote:
>> In some cases reboot sequence fails to detect the ide device in the
>> rombios
>> sequence for ata_detect, since ioport writes are ignored when the
>> ide device status indicates busy or data request in progres.
>> The ide if must be reset when system reset.
>>
>> Signed-off-by: Naphtali Sprei <nsprei@redhat.com>
>>   
> 
> What is this against?
> 
>> -    qemu_register_reset(piix3_reset, 0, d);
>> -    piix3_reset(d);
>> -
>>   
> 
> qemu_register_reset hasn't had this signature in a long time.  I think
> you need to rebase against tip.

thanks, rebased against tip. Also added text to comment.

 Naphtali

> 
> Regards,
> 
> Anthony Liguori
> 
> 

Subject: [PATCH] call ide_reset when resetting the piix

In some cases reboot sequence fails to detect the ide device in the rombios
sequence for ata_detect, since ioport writes are ignored when the
ide device status indicates busy or data request in progres.
The ide if must be reset when system reset.

Moved the location of calling piix3_reset since now it must come after
initialization: ide_init2, it eventually calls ide_dummy_transfer_stop
that uses the io_buffer.

Signed-off-by: Naphtali Sprei <nsprei@redhat.com>
---
 hw/ide.c |   14 ++++++++------
 1 files changed, 8 insertions(+), 6 deletions(-)

Patch hide | download patch | download mbox

diff --git a/hw/ide.c b/hw/ide.c
index 6cf04a6..7e1b776 100644
--- a/hw/ide.c
+++ b/hw/ide.c
@@ -3368,6 +3368,8 @@  static void piix3_reset(void *opaque)
 
     for (i = 0; i < 2; i++)
         ide_dma_cancel(&d->bmdma[i]);
+    for (i = 0; i < 4; i++)
+        ide_reset(&d->ide_if[i]);
 
     pci_conf[0x04] = 0x00;
     pci_conf[0x05] = 0x00;
@@ -3399,9 +3401,6 @@  void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn,
     pci_config_set_class(pci_conf, PCI_CLASS_STORAGE_IDE);
     pci_conf[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL; // header_type
 
-    qemu_register_reset(piix3_reset, d);
-    piix3_reset(d);
-
     pci_register_bar((PCIDevice *)d, 4, 0x10,
                            PCI_ADDRESS_SPACE_IO, bmdma_map);
 
@@ -3414,6 +3413,9 @@  void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn,
         if (hd_table[i])
             hd_table[i]->private = &d->dev;
 
+    qemu_register_reset(piix3_reset, d);
+    piix3_reset(d);
+
     register_savevm("ide", 0, 2, pci_ide_save, pci_ide_load, d);
 }
 
@@ -3439,9 +3441,6 @@  void pci_piix4_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn,
     pci_config_set_class(pci_conf, PCI_CLASS_STORAGE_IDE);
     pci_conf[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL; // header_type
 
-    qemu_register_reset(piix3_reset, d);
-    piix3_reset(d);
-
     pci_register_bar((PCIDevice *)d, 4, 0x10,
                            PCI_ADDRESS_SPACE_IO, bmdma_map);
 
@@ -3450,6 +3449,9 @@  void pci_piix4_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn,
     ide_init_ioport(&d->ide_if[0], 0x1f0, 0x3f6);
     ide_init_ioport(&d->ide_if[2], 0x170, 0x376);
 
+    qemu_register_reset(piix3_reset, d);
+    piix3_reset(d);
+
     register_savevm("ide", 0, 2, pci_ide_save, pci_ide_load, d);
 }