Patchwork [V3,01/14] target-ppc: Add Flag for Power ISA V2.06

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Submitter Tom Musta
Date Dec. 18, 2013, 8:48 p.m.
Message ID <1387399747-4994-2-git-send-email-tommusta@gmail.com>
Download mbox | patch
Permalink /patch/303054/
State New
Headers show

Comments

Tom Musta - Dec. 18, 2013, 8:48 p.m.
This patch adds a flag for base instruction additions to Power ISA
2.06B.  The flag will be used to identify/select basic Book I and
Book II instructions that were newly added in that revision of the
architecture.  The flag will not be used for VSX or Altivec.

Signed-off-by: Tom Musta <tommusta@gmail.com>
---
 target-ppc/cpu.h            |    4 +++-
 target-ppc/translate_init.c |    6 ++++--
 2 files changed, 7 insertions(+), 3 deletions(-)
Richard Henderson - Dec. 24, 2013, 3:11 p.m.
On 12/18/2013 12:48 PM, Tom Musta wrote:
> This patch adds a flag for base instruction additions to Power ISA
> 2.06B.  The flag will be used to identify/select basic Book I and
> Book II instructions that were newly added in that revision of the
> architecture.  The flag will not be used for VSX or Altivec.
> 
> Signed-off-by: Tom Musta <tommusta@gmail.com>
> ---
>  target-ppc/cpu.h            |    4 +++-
>  target-ppc/translate_init.c |    6 ++++--
>  2 files changed, 7 insertions(+), 3 deletions(-)

Reviewed-by: Richard Henderson <rth@twiddle.net>


r~

Patch

diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 0abc848..fe3aace 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -1877,9 +1877,11 @@  enum {
     PPC2_ISA205        = 0x0000000000000020ULL,
     /* VSX additions in ISA 2.07                                             */
     PPC2_VSX207        = 0x0000000000000040ULL,
+    /* Book I 2.06B PowerPC specification (base instructions)                */
+    PPC2_ISA206        = 0x0000000000000080ULL,
 
 #define PPC_TCG_INSNS2 (PPC2_BOOKE206 | PPC2_VSX | PPC2_PRCNTL | PPC2_DBRX | \
-                        PPC2_ISA205 | PPC2_VSX207)
+                        PPC2_ISA205 | PPC2_VSX207 | PPC2_ISA206)
 };
 
 /*****************************************************************************/
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index e14ab63..491e56c 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -7234,7 +7234,8 @@  POWERPC_FAMILY(POWER7)(ObjectClass *oc, void *data)
                        PPC_64B | PPC_ALTIVEC |
                        PPC_SEGMENT_64B | PPC_SLBI |
                        PPC_POPCNTB | PPC_POPCNTWD;
-    pcc->insns_flags2 = PPC2_VSX | PPC2_DFP | PPC2_DBRX | PPC2_ISA205;
+    pcc->insns_flags2 = PPC2_VSX | PPC2_DFP | PPC2_DBRX | PPC2_ISA205 |
+                        PPC2_ISA206;
     pcc->msr_mask = 0x800000000284FF37ULL;
     pcc->mmu_model = POWERPC_MMU_2_06;
 #if defined(CONFIG_SOFTMMU)
@@ -7270,7 +7271,8 @@  POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data)
                        PPC_64B | PPC_ALTIVEC |
                        PPC_SEGMENT_64B | PPC_SLBI |
                        PPC_POPCNTB | PPC_POPCNTWD;
-    pcc->insns_flags2 = PPC2_VSX | PPC2_VSX207 | PPC2_DFP | PPC2_DBRX;
+    pcc->insns_flags2 = PPC2_VSX | PPC2_VSX207 | PPC2_DFP | PPC2_DBRX |
+                        PPC2_ISA206;
     pcc->msr_mask = 0x800000000284FF36ULL;
     pcc->mmu_model = POWERPC_MMU_2_06;
 #if defined(CONFIG_SOFTMMU)