Patchwork ARM: imx6: Derive spdif clock from pll3_pfd3_454m

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Submitter Nicolin Chen
Date Dec. 13, 2013, 3:37 p.m.
Message ID <1386949072-6520-1-git-send-email-Guangyu.Chen@freescale.com>
Download mbox | patch
Permalink /patch/301060/
State New
Headers show

Comments

Nicolin Chen - Dec. 13, 2013, 3:37 p.m.
SPDIF can derive a TX clock for playback from one of its clock sources --
spdif root clock to match its supporting sample rates. So this patch set
the spdif root clock's parent to pll3_pfd3_454m since the pll3_pfd3_454m
can approximately meet its sample rate requirement.

Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
---
 arch/arm/mach-imx/clk-imx6q.c  | 3 +++
 arch/arm/mach-imx/clk-imx6sl.c | 3 +++
 2 files changed, 6 insertions(+)
Shawn Guo - Dec. 14, 2013, 2:15 p.m.
On Fri, Dec 13, 2013 at 11:37:52PM +0800, Nicolin Chen wrote:
> SPDIF can derive a TX clock for playback from one of its clock sources --
> spdif root clock to match its supporting sample rates. So this patch set
> the spdif root clock's parent to pll3_pfd3_454m since the pll3_pfd3_454m
> can approximately meet its sample rate requirement.
> 
> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>

Applied, thanks.

Patch

diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index 74ecceb..af2e582 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -475,6 +475,9 @@  static void __init imx6q_clocks_init(struct device_node *ccm_node)
 	if (ret)
 		pr_warn("failed to set up CLKO: %d\n", ret);
 
+	/* Audio-related clocks configuration */
+	clk_set_parent(clk[spdif_sel], clk[pll3_pfd3_454m]);
+
 	/* All existing boards with PCIe use LVDS1 */
 	if (IS_ENABLED(CONFIG_PCI_IMX6))
 		clk_set_parent(clk[lvds1_sel], clk[sata_ref]);
diff --git a/arch/arm/mach-imx/clk-imx6sl.c b/arch/arm/mach-imx/clk-imx6sl.c
index a747a7d..a222280 100644
--- a/arch/arm/mach-imx/clk-imx6sl.c
+++ b/arch/arm/mach-imx/clk-imx6sl.c
@@ -261,6 +261,9 @@  static void __init imx6sl_clocks_init(struct device_node *ccm_node)
 		clk_prepare_enable(clks[IMX6SL_CLK_USBPHY2_GATE]);
 	}
 
+	/* Audio-related clocks configuration */
+	clk_set_parent(clks[IMX6SL_CLK_SPDIF0_SEL], clks[IMX6SL_CLK_PLL3_PFD3]);
+
 	np = of_find_compatible_node(NULL, NULL, "fsl,imx6sl-gpt");
 	base = of_iomap(np, 0);
 	WARN_ON(!base);