@@ -59,6 +59,7 @@ static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };
static bool has_pci_info;
static bool has_acpi_build = true;
+static bool gigabyte_align = true;
/* PC hardware initialisation */
static void pc_init1(QEMUMachineInitArgs *args,
@@ -105,8 +106,9 @@ static void pc_init1(QEMUMachineInitArgs *args,
}
if (args->ram_size >= 0xe0000000) {
- above_4g_mem_size = args->ram_size - 0xe0000000;
- below_4g_mem_size = 0xe0000000;
+ ram_addr_t lowmem = gigabyte_align ? 0xc0000000 : 0xe0000000;
+ above_4g_mem_size = args->ram_size - lowmem;
+ below_4g_mem_size = lowmem;
} else {
above_4g_mem_size = 0;
below_4g_mem_size = args->ram_size;
@@ -235,11 +237,17 @@ static void pc_init_pci(QEMUMachineInitArgs *args)
pc_init1(args, 1, 1);
}
+static void pc_compat_1_7(QEMUMachineInitArgs *args)
+{
+ gigabyle_align = false;
+}
+
static void pc_compat_1_6(QEMUMachineInitArgs *args)
{
has_pci_info = false;
rom_file_in_ram = false;
has_acpi_build = false;
+ pc_compat_1_7(args);
}
static void pc_compat_1_5(QEMUMachineInitArgs *args)
@@ -267,6 +275,12 @@ static void pc_compat_1_2(QEMUMachineInitArgs *args)
disable_kvm_pv_eoi();
}
+static void pc_init_pci_1_7(QEMUMachineInitArgs *args)
+{
+ pc_compat_1_7(args);
+ pc_init_pci(args);
+}
+
static void pc_init_pci_1_6(QEMUMachineInitArgs *args)
{
pc_compat_1_6(args);
@@ -356,7 +370,7 @@ static QEMUMachine pc_i440fx_machine_v2_0 = {
static QEMUMachine pc_i440fx_machine_v1_7 = {
PC_I440FX_1_7_MACHINE_OPTIONS,
.name = "pc-i440fx-1.7",
- .init = pc_init_pci,
+ .init = pc_init_pci_1_7,
};
#define PC_I440FX_1_6_MACHINE_OPTIONS PC_I440FX_MACHINE_OPTIONS
@@ -49,6 +49,7 @@
static bool has_pci_info;
static bool has_acpi_build = true;
+static bool gigabyte_align = true;
/* PC hardware initialisation */
static void pc_q35_init(QEMUMachineInitArgs *args)
@@ -91,8 +92,9 @@ static void pc_q35_init(QEMUMachineInitArgs *args)
kvmclock_create();
if (args->ram_size >= 0xb0000000) {
- above_4g_mem_size = args->ram_size - 0xb0000000;
- below_4g_mem_size = 0xb0000000;
+ ram_addr_t lowmem = gigabyte_align ? 0x80000000 : 0xb0000000;
+ above_4g_mem_size = args->ram_size - lowmem;
+ below_4g_mem_size = lowmem;
} else {
above_4g_mem_size = 0;
below_4g_mem_size = args->ram_size;
@@ -217,11 +219,17 @@ static void pc_q35_init(QEMUMachineInitArgs *args)
}
}
+static void pc_compat_1_7(QEMUMachineInitArgs *args)
+{
+ gigabyte_align = false;
+}
+
static void pc_compat_1_6(QEMUMachineInitArgs *args)
{
has_pci_info = false;
rom_file_in_ram = false;
has_acpi_build = false;
+ pc_compat_1_7(args);
}
static void pc_compat_1_5(QEMUMachineInitArgs *args)
@@ -236,6 +244,12 @@ static void pc_compat_1_4(QEMUMachineInitArgs *args)
x86_cpu_compat_set_features("Westmere", FEAT_1_ECX, 0, CPUID_EXT_PCLMULQDQ);
}
+static void pc_q35_init_1_7(QEMUMachineInitArgs *args)
+{
+ pc_compat_1_7(args);
+ pc_q35_init(args);
+}
+
static void pc_q35_init_1_6(QEMUMachineInitArgs *args)
{
pc_compat_1_6(args);
@@ -275,7 +289,7 @@ static QEMUMachine pc_q35_machine_v2_0 = {
static QEMUMachine pc_q35_machine_v1_7 = {
PC_Q35_1_7_MACHINE_OPTIONS,
.name = "pc-q35-1.7",
- .init = pc_q35_init,
+ .init = pc_q35_init_1_7,
};
#define PC_Q35_1_6_MACHINE_OPTIONS PC_Q35_MACHINE_OPTIONS
Map 3G (i440fx) or 2G (q35) of memory below 4G, so the RAM pieces are nicely aligned to gigabyte borders. Keep old memory layout for (a) old machine types and (b) in case all memory fits below 4G and thus we don't have to split RAM into pieces in the first place. The later makes sure this change doesn't take away memory from 32bit guests. So, with i440fx and up to 3.5 GB of memory, all of it will be mapped below 4G. With more than 3.5 GB of memory 3 GB will be mapped below 4G and the remaining amount will be mapped above 4G. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> --- hw/i386/pc_piix.c | 20 +++++++++++++++++--- hw/i386/pc_q35.c | 20 +++++++++++++++++--- 2 files changed, 34 insertions(+), 6 deletions(-)