From patchwork Mon Dec 9 22:06:49 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Warren X-Patchwork-Id: 299212 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from mail-qc0-x23a.google.com (mail-qc0-x23a.google.com [IPv6:2607:f8b0:400d:c01::23a]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (Client CN "smtp.gmail.com", Issuer "Google Internet Authority G2" (not verified)) by ozlabs.org (Postfix) with ESMTPS id B50292C00AB for ; Tue, 10 Dec 2013 09:07:07 +1100 (EST) Received: by mail-qc0-f186.google.com with SMTP id e9sf1169495qcy.23 for ; Mon, 09 Dec 2013 14:07:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlegroups.com; s=20120806; h=mime-version:from:to:cc:subject:date:message-id:in-reply-to :references:x-original-sender:x-original-authentication-results :reply-to:precedence:mailing-list:list-id:list-post:list-help :list-archive:sender:list-subscribe:list-unsubscribe:content-type; bh=DRAZ7841AdzeyGER6fsHX4sAT+PPjBbAYv1pAu21adk=; b=E+xmZIP+HVh8rP6PWqlqedWZWEwaKyHxBwsZdAGwiZdDauh6LRWGVz7g08xQDRVWT8 GFJ6e7V24SKmZTTbxJLQK3IGVoURraS7pemLJYZduAQF/qtwbiC4BITeVbnK3IzPFzie 0DvjZyglitmERf6TZDYJM7jK6VwEWs9fObkNmEhdR5e/wmNHS0Ys7zGKIyBrt56oZCTD DMTkYx7NP7/f6uTjlEyZbz1Md9pM4qN2/JvmszZpo4VYnCa8yA4nU1kqpqS/3HE4ZwEf yOZbkn+lblfaG+h4IGMNiCOhxwTb9e9uw1E3ivTaUDWHn5yS6fmnMTfXHUC3QGoU4tFB We4g== X-Received: by 10.182.251.134 with SMTP id zk6mr29386obc.38.1386626824886; Mon, 09 Dec 2013 14:07:04 -0800 (PST) MIME-Version: 1.0 X-BeenThere: rtc-linux@googlegroups.com Received: by 10.182.34.198 with SMTP id b6ls1003405obj.18.gmail; Mon, 09 Dec 2013 14:07:04 -0800 (PST) X-Received: by 10.182.230.168 with SMTP id sz8mr7447557obc.9.1386626824588; Mon, 09 Dec 2013 14:07:04 -0800 (PST) Received: from avon.wwwdotorg.org (avon.wwwdotorg.org. [70.85.31.133]) by gmr-mx.google.com with ESMTPS id e8si1580205igg.0.2013.12.09.14.07.04 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Mon, 09 Dec 2013 14:07:04 -0800 (PST) Received-SPF: pass (google.com: domain of swarren@wwwdotorg.org designates 70.85.31.133 as permitted sender) client-ip=70.85.31.133; Received: from severn.wwwdotorg.org (unknown [192.168.65.5]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by avon.wwwdotorg.org (Postfix) with ESMTPS id 4484E6446; Mon, 9 Dec 2013 15:07:04 -0700 (MST) Received: from swarren-lx1.nvidia.com (localhost [127.0.0.1]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by severn.wwwdotorg.org (Postfix) with ESMTPSA id B5D62E460E; Mon, 9 Dec 2013 15:06:47 -0700 (MST) From: Stephen Warren To: Lee Jones , Samuel Ortiz , Alessandro Zummo , Andrew Morton Cc: Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, rtc-linux@googlegroups.com, Stephen Warren Subject: [rtc-linux] [PATCH 3/3] ARM: tegra: set up /aliases entries for RTCs Date: Mon, 9 Dec 2013 15:06:49 -0700 Message-Id: <1386626809-6251-3-git-send-email-swarren@wwwdotorg.org> X-Mailer: git-send-email 1.8.1.5 In-Reply-To: <1386626809-6251-1-git-send-email-swarren@wwwdotorg.org> References: <1386626809-6251-1-git-send-email-swarren@wwwdotorg.org> X-NVConfidentiality: public X-Virus-Scanned: clamav-milter 0.97.8 at avon.wwwdotorg.org X-Virus-Status: Clean X-Original-Sender: swarren@wwwdotorg.org X-Original-Authentication-Results: gmr-mx.google.com; spf=pass (google.com: domain of swarren@wwwdotorg.org designates 70.85.31.133 as permitted sender) smtp.mail=swarren@wwwdotorg.org Reply-To: rtc-linux@googlegroups.com Precedence: list Mailing-list: list rtc-linux@googlegroups.com; contact rtc-linux+owners@googlegroups.com List-ID: X-Google-Group-Id: 712029733259 List-Post: , List-Help: , List-Archive: Sender: rtc-linux@googlegroups.com List-Subscribe: , List-Unsubscribe: , From: Stephen Warren This ensures that the PMIC RTC provides the system time, rather than the on-SoC RTC, which is not battery-backed. Signed-off-by: Stephen Warren --- This patch is just an example. If the previous two patches are accepted, I'll flesh this patch out to cover all boards, and repost. --- arch/arm/boot/dts/tegra20-seaboard.dts | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts b/arch/arm/boot/dts/tegra20-seaboard.dts index ff63da7ff00d..1e62b7c5611f 100644 --- a/arch/arm/boot/dts/tegra20-seaboard.dts +++ b/arch/arm/boot/dts/tegra20-seaboard.dts @@ -6,6 +6,11 @@ model = "NVIDIA Seaboard"; compatible = "nvidia,seaboard", "nvidia,tegra20"; + aliases { + rtc0 = "/i2c@7000d000/tps6586x@34"; + rtc1 = "/rtc@7000e000"; + }; + memory { reg = <0x00000000 0x40000000>; };