diff mbox

[02/18] target-ppc: Add ISA2.06 bpermd Instruction

Message ID 1386604035-2507-3-git-send-email-tommusta@gmail.com
State New
Headers show

Commit Message

Tom Musta Dec. 9, 2013, 3:46 p.m. UTC
This patch adds the Bit Permute Doubleword (bpermd) instruction,
which was introduced in Power ISA 2.06 as part of the base 64-bit
architecture.

Signed-off-by: Tom Musta <tommusta@gmail.com>
---
 target-ppc/helper.h     |    1 +
 target-ppc/int_helper.c |   20 ++++++++++++++++++++
 target-ppc/translate.c  |   10 ++++++++++
 3 files changed, 31 insertions(+), 0 deletions(-)

Comments

Richard Henderson Dec. 10, 2013, 12:01 a.m. UTC | #1
On 12/09/2013 07:46 AM, Tom Musta wrote:
> +    for (i = 0; i < 8; i++) {
> +        int index = (rs & (0xFFul) << (i*8)) >> (i*8);

This is a silly expression.  Better as

    int index = (rs >> (i * 8)) & 0xff;

> +                ra |= (1<<i);

Unnecessary parens, and missing spaces around the operator.


r~
Tom Musta Dec. 10, 2013, 5:47 p.m. UTC | #2
On 12/9/2013 6:01 PM, Richard Henderson wrote:
> On 12/09/2013 07:46 AM, Tom Musta wrote:
>> +    for (i = 0; i < 8; i++) {
>> +        int index = (rs & (0xFFul) << (i*8)) >> (i*8);
> 
> This is a silly expression.  Better as
> 
>     int index = (rs >> (i * 8)) & 0xff;
> 
>> +                ra |= (1<<i);
> 
> Unnecessary parens, and missing spaces around the operator.


Thanks, as always, for reviewing.  I concur with most of the comments ...
will respond only to those that I either disagree with or have further
questions.
diff mbox

Patch

diff --git a/target-ppc/helper.h b/target-ppc/helper.h
index 6250eba..1ec9c65 100644
--- a/target-ppc/helper.h
+++ b/target-ppc/helper.h
@@ -41,6 +41,7 @@  DEF_HELPER_3(sraw, tl, env, tl, tl)
 #if defined(TARGET_PPC64)
 DEF_HELPER_FLAGS_1(cntlzd, TCG_CALL_NO_RWG_SE, tl, tl)
 DEF_HELPER_FLAGS_1(popcntd, TCG_CALL_NO_RWG_SE, tl, tl)
+DEF_HELPER_3(bpermd, i64, env, i64, i64)
 DEF_HELPER_3(srad, tl, env, tl, tl)
 #endif
 
diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c
index e50bdd2..c140a0d 100644
--- a/target-ppc/int_helper.c
+++ b/target-ppc/int_helper.c
@@ -53,6 +53,26 @@  target_ulong helper_cntlzd(target_ulong t)
 }
 #endif
 
+#if defined(TARGET_PPC64)
+
+uint64_t helper_bpermd(CPUPPCState *env, uint64_t rs, uint64_t rb)
+{
+    int i;
+    uint64_t ra = 0;
+
+    for (i = 0; i < 8; i++) {
+        int index = (rs & (0xFFul) << (i*8)) >> (i*8);
+        if (index < 64) {
+            if (rb & (1ul << (63-index))) {
+                ra |= (1<<i);
+            }
+        }
+    }
+    return ra;
+}
+
+#endif
+
 target_ulong helper_cmpb(target_ulong rs, target_ulong rb)
 {
     target_ulong mask = 0xff;
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 1f7e499..0d39de2 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -1525,6 +1525,15 @@  static void gen_prtyd(DisasContext *ctx)
 #endif
 
 #if defined(TARGET_PPC64)
+/* bpermd */
+static void gen_bpermd(DisasContext *ctx)
+{
+    gen_helper_bpermd(cpu_gpr[rA(ctx->opcode)], cpu_env,
+                      cpu_gpr[rS(ctx->opcode)], cpu_gpr[rB(ctx->opcode)]);
+}
+#endif
+
+#if defined(TARGET_PPC64)
 /* extsw & extsw. */
 GEN_LOGICAL1(extsw, tcg_gen_ext32s_tl, 0x1E, PPC_64B);
 
@@ -9322,6 +9331,7 @@  GEN_HANDLER_E(prtyw, 0x1F, 0x1A, 0x04, 0x0000F801, PPC_NONE, PPC2_ISA205),
 GEN_HANDLER(popcntd, 0x1F, 0x1A, 0x0F, 0x0000F801, PPC_POPCNTWD),
 GEN_HANDLER(cntlzd, 0x1F, 0x1A, 0x01, 0x00000000, PPC_64B),
 GEN_HANDLER_E(prtyd, 0x1F, 0x1A, 0x05, 0x0000F801, PPC_NONE, PPC2_ISA205),
+GEN_HANDLER_E(bpermd, 0x1F, 0x1C, 0x07, 0x00000001, PPC_NONE, PPC2_ISA206),
 #endif
 GEN_HANDLER(rlwimi, 0x14, 0xFF, 0xFF, 0x00000000, PPC_INTEGER),
 GEN_HANDLER(rlwinm, 0x15, 0xFF, 0xFF, 0x00000000, PPC_INTEGER),