Patchwork [1/2] cputlb: Use memset when flushing entries

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Submitter Richard Henderson
Date Dec. 6, 2013, 9:44 p.m.
Message ID <1386366292-5340-1-git-send-email-rth@twiddle.net>
Download mbox | patch
Permalink /patch/298280/
State New
Headers show

Comments

Richard Henderson - Dec. 6, 2013, 9:44 p.m.
The size of tlb_table is 4k on a 64-bit host.  For overwriting
memory at this size, cacheline tricks can help.

Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 cputlb.c | 19 ++-----------------
 1 file changed, 2 insertions(+), 17 deletions(-)
Aurelien Jarno - Dec. 22, 2013, 6:04 p.m.
On Sat, Dec 07, 2013 at 10:44:51AM +1300, Richard Henderson wrote:
> The size of tlb_table is 4k on a 64-bit host.  For overwriting
> memory at this size, cacheline tricks can help.
> 
> Signed-off-by: Richard Henderson <rth@twiddle.net>
> ---
>  cputlb.c | 19 ++-----------------
>  1 file changed, 2 insertions(+), 17 deletions(-)
> 
> diff --git a/cputlb.c b/cputlb.c
> index fff0afb..d2da404 100644
> --- a/cputlb.c
> +++ b/cputlb.c
> @@ -33,13 +33,6 @@
>  /* statistics */
>  int tlb_flush_count;
>  
> -static const CPUTLBEntry s_cputlb_empty_entry = {
> -    .addr_read  = -1,
> -    .addr_write = -1,
> -    .addr_code  = -1,
> -    .addend     = -1,
> -};
> -
>  /* NOTE:
>   * If flush_global is true (the usual case), flush all tlb entries.
>   * If flush_global is false, flush (at least) all tlb entries not
> @@ -55,7 +48,6 @@ static const CPUTLBEntry s_cputlb_empty_entry = {
>  void tlb_flush(CPUArchState *env, int flush_global)
>  {
>      CPUState *cpu = ENV_GET_CPU(env);
> -    int i;
>  
>  #if defined(DEBUG_TLB)
>      printf("tlb_flush:\n");
> @@ -64,14 +56,7 @@ void tlb_flush(CPUArchState *env, int flush_global)
>         links while we are modifying them */
>      cpu->current_tb = NULL;
>  
> -    for (i = 0; i < CPU_TLB_SIZE; i++) {
> -        int mmu_idx;
> -
> -        for (mmu_idx = 0; mmu_idx < NB_MMU_MODES; mmu_idx++) {
> -            env->tlb_table[mmu_idx][i] = s_cputlb_empty_entry;
> -        }
> -    }
> -
> +    memset(env->tlb_table, -1, sizeof(env->tlb_table));
>      memset(env->tb_jmp_cache, 0, TB_JMP_CACHE_SIZE * sizeof (void *));
>  
>      env->tlb_flush_addr = -1;
> @@ -87,7 +72,7 @@ static inline void tlb_flush_entry(CPUTLBEntry *tlb_entry, target_ulong addr)
>                   (TARGET_PAGE_MASK | TLB_INVALID_MASK)) ||
>          addr == (tlb_entry->addr_code &
>                   (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
> -        *tlb_entry = s_cputlb_empty_entry;
> +        memset(tlb_entry, -1, sizeof(*tlb_entry));
>      }
>  }

Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Andreas Färber - Dec. 23, 2013, 2:37 p.m.
Am 22.12.2013 19:04, schrieb Aurelien Jarno:
> On Sat, Dec 07, 2013 at 10:44:51AM +1300, Richard Henderson wrote:
>> The size of tlb_table is 4k on a 64-bit host.  For overwriting
>> memory at this size, cacheline tricks can help.
>>
>> Signed-off-by: Richard Henderson <rth@twiddle.net>
>> ---
>>  cputlb.c | 19 ++-----------------
>>  1 file changed, 2 insertions(+), 17 deletions(-)
[...]
> 
> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>

Don't spot a matching cover letter - thanks, applied both to qom-cpu:
https://github.com/afaerber/qemu-cpu/commits/qom-cpu

Andreas

Patch

diff --git a/cputlb.c b/cputlb.c
index fff0afb..d2da404 100644
--- a/cputlb.c
+++ b/cputlb.c
@@ -33,13 +33,6 @@ 
 /* statistics */
 int tlb_flush_count;
 
-static const CPUTLBEntry s_cputlb_empty_entry = {
-    .addr_read  = -1,
-    .addr_write = -1,
-    .addr_code  = -1,
-    .addend     = -1,
-};
-
 /* NOTE:
  * If flush_global is true (the usual case), flush all tlb entries.
  * If flush_global is false, flush (at least) all tlb entries not
@@ -55,7 +48,6 @@  static const CPUTLBEntry s_cputlb_empty_entry = {
 void tlb_flush(CPUArchState *env, int flush_global)
 {
     CPUState *cpu = ENV_GET_CPU(env);
-    int i;
 
 #if defined(DEBUG_TLB)
     printf("tlb_flush:\n");
@@ -64,14 +56,7 @@  void tlb_flush(CPUArchState *env, int flush_global)
        links while we are modifying them */
     cpu->current_tb = NULL;
 
-    for (i = 0; i < CPU_TLB_SIZE; i++) {
-        int mmu_idx;
-
-        for (mmu_idx = 0; mmu_idx < NB_MMU_MODES; mmu_idx++) {
-            env->tlb_table[mmu_idx][i] = s_cputlb_empty_entry;
-        }
-    }
-
+    memset(env->tlb_table, -1, sizeof(env->tlb_table));
     memset(env->tb_jmp_cache, 0, TB_JMP_CACHE_SIZE * sizeof (void *));
 
     env->tlb_flush_addr = -1;
@@ -87,7 +72,7 @@  static inline void tlb_flush_entry(CPUTLBEntry *tlb_entry, target_ulong addr)
                  (TARGET_PAGE_MASK | TLB_INVALID_MASK)) ||
         addr == (tlb_entry->addr_code &
                  (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
-        *tlb_entry = s_cputlb_empty_entry;
+        memset(tlb_entry, -1, sizeof(*tlb_entry));
     }
 }