From patchwork Sat Dec 7 00:20:58 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qiaowei Ren X-Patchwork-Id: 298108 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 47BA02C00A0 for ; Sat, 7 Dec 2013 04:12:23 +1100 (EST) Received: from localhost ([::1]:60496 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Voywu-0004ge-Kr for incoming@patchwork.ozlabs.org; Fri, 06 Dec 2013 12:12:20 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40043) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Voyr2-0005GL-IJ for qemu-devel@nongnu.org; Fri, 06 Dec 2013 12:06:21 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Voyqw-0004bV-GB for qemu-devel@nongnu.org; Fri, 06 Dec 2013 12:06:16 -0500 Received: from mga11.intel.com ([192.55.52.93]:26645) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Voyqw-0004av-BM for qemu-devel@nongnu.org; Fri, 06 Dec 2013 12:06:10 -0500 Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga102.fm.intel.com with ESMTP; 06 Dec 2013 09:05:57 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.93,841,1378882800"; d="scan'208";a="445842043" Received: from unknown (HELO localhost.localdomain.org) ([10.239.48.201]) by fmsmga002.fm.intel.com with ESMTP; 06 Dec 2013 09:05:54 -0800 From: Qiaowei Ren To: Paolo Bonzini , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org Date: Sat, 7 Dec 2013 08:20:58 +0800 Message-Id: <1386375658-2191-3-git-send-email-qiaowei.ren@intel.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1386375658-2191-1-git-send-email-qiaowei.ren@intel.com> References: <1386375658-2191-1-git-send-email-qiaowei.ren@intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 192.55.52.93 Cc: Liu Jinsong , kvm@vger.kernel.org, Xudong Hao , linux-kernel@vger.kernel.org, qemu-devel@nongnu.org, Qiaowei Ren Subject: [Qemu-devel] [PATCH v2 3/3] X86, mpx: Intel MPX xstate feature definition X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org This patch defines xstate feature and extends struct xsave_hdr_struct to support Intel MPX. Signed-off-by: Qiaowei Ren Signed-off-by: Xudong Hao Signed-off-by: Liu Jinsong --- arch/x86/include/asm/processor.h | 12 ++++++++++++ arch/x86/include/asm/xsave.h | 5 ++++- 2 files changed, 16 insertions(+), 1 deletions(-) diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h index 987c75e..2fe2e75 100644 --- a/arch/x86/include/asm/processor.h +++ b/arch/x86/include/asm/processor.h @@ -370,6 +370,15 @@ struct ymmh_struct { u32 ymmh_space[64]; }; +struct bndregs_struct { + u64 bndregs[8]; +} __packed; + +struct bndcsr_struct { + u64 cfg_reg_u; + u64 status_reg; +} __packed; + struct xsave_hdr_struct { u64 xstate_bv; u64 reserved1[2]; @@ -380,6 +389,9 @@ struct xsave_struct { struct i387_fxsave_struct i387; struct xsave_hdr_struct xsave_hdr; struct ymmh_struct ymmh; + u8 lwp_area[128]; + struct bndregs_struct bndregs; + struct bndcsr_struct bndcsr; /* new processor state extensions will go here */ } __attribute__ ((packed, aligned (64))); diff --git a/arch/x86/include/asm/xsave.h b/arch/x86/include/asm/xsave.h index 0415cda..7fa8855 100644 --- a/arch/x86/include/asm/xsave.h +++ b/arch/x86/include/asm/xsave.h @@ -9,6 +9,8 @@ #define XSTATE_FP 0x1 #define XSTATE_SSE 0x2 #define XSTATE_YMM 0x4 +#define XSTATE_BNDREGS 0x8 +#define XSTATE_BNDCSR 0x10 #define XSTATE_FPSSE (XSTATE_FP | XSTATE_SSE) @@ -20,10 +22,11 @@ #define XSAVE_YMM_SIZE 256 #define XSAVE_YMM_OFFSET (XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET) +#define XSTATE_EAGER (XSTATE_BNDREGS | XSTATE_BNDCSR) /* * These are the features that the OS can handle currently. */ -#define XCNTXT_MASK (XSTATE_FP | XSTATE_SSE | XSTATE_YMM) +#define XCNTXT_MASK (XSTATE_FP | XSTATE_SSE | XSTATE_YMM | XSTATE_EAGER) #ifdef CONFIG_X86_64 #define REX_PREFIX "0x48, "