Patchwork [v2,1/2] target-i386: fix cpuid leaf 0x0d

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Submitter Liu, Jinsong
Date Dec. 4, 2013, 7:55 a.m.
Message ID <DE8DF0795D48FD4CA783C40EC829233501400040@SHSMSX101.ccr.corp.intel.com>
Download mbox | patch
Permalink /patch/296424/
State New
Headers show

Comments

Liu, Jinsong - Dec. 4, 2013, 7:55 a.m.
From cb3b12dd9873929b3a03214e3aa0ee5297e75119 Mon Sep 17 00:00:00 2001
From: Liu Jinsong <jinsong.liu@intel.com>
Date: Tue, 3 Dec 2013 04:17:50 +0800
Subject: [PATCH v2 1/2] target-i386: fix cpuid leaf 0x0d

Fix cpuid leaf 0x0d which incorrectly parsed eax and ebx.

However, before this patch the CPUID worked fine -- the .offset
field contained the size _and_ was stored in the register that
is supposed to hold the size (eax), and likewise the .size field
contained the offset _and_ was stored in the register trhat is
supposed to hold the offset (ebx).

Signed-off-by: Liu Jinsong <jinsong.liu@intel.com>
---
 target-i386/cpu.c |    6 +++---
 1 files changed, 3 insertions(+), 3 deletions(-)
Paolo Bonzini - Dec. 5, 2013, 4:12 p.m.
Il 04/12/2013 08:55, Liu, Jinsong ha scritto:
> From cb3b12dd9873929b3a03214e3aa0ee5297e75119 Mon Sep 17 00:00:00 2001
> From: Liu Jinsong <jinsong.liu@intel.com>
> Date: Tue, 3 Dec 2013 04:17:50 +0800
> Subject: [PATCH v2 1/2] target-i386: fix cpuid leaf 0x0d
> 
> Fix cpuid leaf 0x0d which incorrectly parsed eax and ebx.
> 
> However, before this patch the CPUID worked fine -- the .offset
> field contained the size _and_ was stored in the register that
> is supposed to hold the size (eax), and likewise the .size field
> contained the offset _and_ was stored in the register trhat is
> supposed to hold the offset (ebx).
> 
> Signed-off-by: Liu Jinsong <jinsong.liu@intel.com>
> ---
>  target-i386/cpu.c |    6 +++---
>  1 files changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/target-i386/cpu.c b/target-i386/cpu.c
> index 864c80e..544b57f 100644
> --- a/target-i386/cpu.c
> +++ b/target-i386/cpu.c
> @@ -335,7 +335,7 @@ typedef struct ExtSaveArea {
>  
>  static const ExtSaveArea ext_save_areas[] = {
>      [2] = { .feature = FEAT_1_ECX, .bits = CPUID_EXT_AVX,
> -            .offset = 0x100, .size = 0x240 },
> +            .offset = 0x240, .size = 0x100 },
>  };
>  
>  const char *get_register_name_32(unsigned int reg)
> @@ -2225,8 +2225,8 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
>              const ExtSaveArea *esa = &ext_save_areas[count];
>              if ((env->features[esa->feature] & esa->bits) == esa->bits &&
>                  (kvm_mask & (1 << count)) != 0) {
> -                *eax = esa->offset;
> -                *ebx = esa->size;
> +                *eax = esa->size;
> +                *ebx = esa->offset;
>              }
>          }
>          break;
> 

Applied to uq/master, thanks.

Paolo

Patch

diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 864c80e..544b57f 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -335,7 +335,7 @@  typedef struct ExtSaveArea {
 
 static const ExtSaveArea ext_save_areas[] = {
     [2] = { .feature = FEAT_1_ECX, .bits = CPUID_EXT_AVX,
-            .offset = 0x100, .size = 0x240 },
+            .offset = 0x240, .size = 0x100 },
 };
 
 const char *get_register_name_32(unsigned int reg)
@@ -2225,8 +2225,8 @@  void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
             const ExtSaveArea *esa = &ext_save_areas[count];
             if ((env->features[esa->feature] & esa->bits) == esa->bits &&
                 (kvm_mask & (1 << count)) != 0) {
-                *eax = esa->offset;
-                *ebx = esa->size;
+                *eax = esa->size;
+                *ebx = esa->offset;
             }
         }
         break;